• Title/Summary/Keyword: impurity profile

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Characterization of Two-Dimensional Impurity Profile in Silicon (실리콘에서의 2차원적 불순물 분포의 산출)

  • Yang, Yeong Yil;Kyung, Chong Min
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.23 no.6
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    • pp.929-935
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    • 1986
  • In this paper, we describe the physical modelling and numerical aspects of a program called PRECISE(Program for Efficient Calculation of Impurity Profile in Semiconductor by Elimination) which calcualtes a two-dimensional impurity profile in silicon due to diffusion and ion implantation steps. The PRECISE enables rapid prediction of the two-dimensional impurity profile near the mask edge-or the bird's beak during the local oxidation process. This has been developed by modifying the existing one-dimentional simulator, DIFSIM(DIFfusion SIMulator to include models for arsenic diffusion and emitter dip effect which were found out to agree fairly well with the xperimental data.

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A Study on the Relation of Doping Profile and Threshold voltage in the Ion-Implanted E-IGFET(I) (Ion-Implanted E-IGFET의 Doping Profile과 Threshold 전압과의 관계에 관한 연구(I))

  • Son, Sang-Hui;O, Eung-Gi;Gwak, Gye-Dal
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.21 no.4
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    • pp.58-64
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    • 1984
  • A simple model for the impurity profile in an ion-implanted channel layer of an enhancement type IGFET is assumed and a simple expression for the threshold voltage derived by using the assumed impurity profile is analyzed in detail. Also, this simple model is applied to simulating the substrate bias dependence of its threshold voltage. Excellent agreement is obtained between theory and experiment on n-channel devices. The error range of threshold voltage between gaussian-profile and box-profile is calculated in this paper and a new method of calculating the depth of ion-implanted Baler D is also introduced.

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A Study on the Threshold voltage and I-V Characteristics in the Ion-implanted Short channel E-IGFET(II) (Ion-Implanted short Channel E-IGFET의 Threshold 전압과 I-V특성에 관한 연구(II))

  • Son, Sang-Hui;Kim, Hong-Bae;Gwak, Gye-Dal
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.22 no.4
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    • pp.51-58
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    • 1985
  • A simple model for the impurity profile in an ion-implanted channel layer of an enhance-ment type IGFET is assumed and a simple expression for the threshold voltage is derived by the assumed impurity profile. In application, the concept of correction factor K is used and the value of threshold voltage is well agreed with experimental value. Also, 1-V character-istics curve is well agreed with experimental value. In addition, this program is packaged and is utilized.

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Analysis and Calibration of Transient Enhanced Diffusion for Indium Impurity in Nanoscale Semiconductor Devices

  • Lee Jun-Ha;Lee Hoong-Joo
    • KIEE International Transactions on Electrophysics and Applications
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    • v.5C no.1
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    • pp.18-22
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    • 2005
  • We developed a new systematic calibration procedure and applied it to the calibration of the diffusivity, segregation and TED model of the indium impurity. The TED of the indium impurity was studied under 4 different experimental conditions. Although the indium proved to be susceptible to the TED, the RTA was effective in suppressing the TED effect and in maintaining a steep retrograde profile. Just as in the case of boron, indium demonstrated significant oxidation-enhanced diffusion in silicon and its segregation coefficients at the Si/SiO₂ interface were significantly below 1. In contrast, the segregation coefficient of indium decreased as the temperature increased. The accuracy of the proposed technique has been validated by SIMS data and 0.13-㎛ device characteristics such as Vth and Idsat with errors less than 5% between simulation and experiment.

Two-dimensional Redistribution of Impurity considering Thermal Oxidation in silicon using BEM (BEM을 이용하여 열산화를 고려한 실리콘 내에서 불순물의 2차원 재분포에 관한 연구)

  • Kim, Hun;Hwang, Ho-Jung
    • Proceedings of the KIEE Conference
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    • 1988.07a
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    • pp.370-374
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    • 1988
  • This paper is concerned with the investigation of the impurity redistribution process in a two step diffusion. In integrated circuit technology, two step boron diffusion involving a deposition step followed by a drive-in step in commonly encounted. The drive-in process is usually performed in oxidizing atmosphere resulting in redistribution of impurity (boron) within the semiconductor. This paper proposes a new numerical analysis method; Bounary Element Method to determine impurity profile at the arbitrary point in domain by its coordinate and boundary value.

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Studies of the $TiO_2-Si$ Interface Bombarded by $Ar^+$ Ion Beam

  • Zhang, J.;Huang, N.K.;Lu, T.C.;Zeng, L.;Din, T.;Chen, Y.K.
    • Journal of the Korean Vacuum Society
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    • v.12 no.S1
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    • pp.63-66
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    • 2003
  • It is experimentally shown that a $TiO_2$ film on Si(111) substrate was prepared by using the technique of D.C. reaction sputter deposition with $Ar^{+}$ ion beam bombardment, and a layer-like structure was observed from the depth profile of the interface between $TiO_2$ film and Si substrate with Scanning Electron Microscopy and Electron Probe. It was also surprisingly discovered that Ti atoms could be detected at about 9 $\mu$m depth. The $TiO_2$-Si interface bombarded by $Ar^{+}$ ion beams revealed multi-layer structures, a mechanism might be caused by defect diffusion, impurity and matrix relocation. Multi-relocations of impurity and matrix atoms were as a result of profile broadening of the $TiO_2$-Si interface, and the spread due to matrix relocation in this system is shown to exceed much more the spread due to impurity relocation.

comparison of Numercal Methods for Obtaining 2-D Impurity Profile in Semiconductor (반도체 내에서의 2차원 불순물 분포를 얻기 위한 수치해법의 비교)

  • Yang, Yeong-Il;Gyeong, Jong-Min;O, Hyeong-Cheol
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.22 no.3
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    • pp.95-102
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    • 1985
  • An efficient numerical scheme for assessing the two-dimensional diffusion problem for modelling impurity profile in semiconductor is described. 4 unique combination of ADI (Al-ternating Direction Bmplicit) method and Gauss Elimination has resulted in a reduction of CPU time for most diffusion processes by a factor of 3, compared to other iteration schemes such as SOR (Successive Over-Relaxation) or Stone's iterative method without additional storage re-quirement. Various numerical schemes were compared for 2-D as well as 1-0 diffusion profile in terms of their CPU time while retaining the magnitude of relative error within 0.001%. good agree-ment between 1-D and 2-D simulation profile as well as between 1-D simulation profile and experiment has been obtained.

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Numerical Evaluation of Impurity Profile in Silicon (수치해법에 의한 실리콘에서의 불순물 분포의 산출)

  • 오형철;경종민
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.21 no.6
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    • pp.17-26
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    • 1984
  • A computer program (DIFSIM: Diffusion SIMulator) was written to calculate the impurity profile, specifically boron and phosphorus, due to three different diffusion processes-predeposition, drive-in in inert ambient, and drive-in in oxidizing ambient. The vacancy mechanism including Fair and Tsai's theory for phosphDrus diffusion was widely incorporated for modeling various diffusion processes. The concentrationtependent oxidation rate was also explained using the vacancy model, while the oxidation - enhanced diffusion was mo dolled using catkins replacement mochanlsm . The simulation results using DIFSIM showed a fairly good agreement with the experimental data by adjusting some of the empirical parameters in the program. The results obtained using DIFSIM were compared with the results from SUPREM II.

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Purification and Characterization of Paclitaxel from Plant Cell Cultures of Taxus chinensis in Large-Scale Process (식물세포 Taxus chinensis 배양으로부터의 Paclitaxel 대량 정제 및 특성)

  • 김진현;기은숙;민범찬;최형균;홍승서;이현수
    • KSBB Journal
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    • v.15 no.5
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    • pp.537-540
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    • 2000
  • In developing a HPLC purification process, it was hoped that a single chromatographic system would be sufficient to abtain pure paclitaxel in high yield. However, no such system was found, due in part to the complex taxoid profile of crude paclitaxel and to the rigorous nature of the product specification. A two step HPLC purification was adopted using reverse-phase separation on C(sub)18 as a first step, and normal-phase separation on silica as the final polishing step. Impurity profiles were established and maintained for paclitaxel, which identified and quantified each impurity observed in purified paclitaxel from these two steps, all impurities at or above 0.1% were identified. Results provide information for improving the quality control of paclitaxel production.

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The Study for Transient Enhanced Diffusion of Indium and Its Application to μm Logic Devices

  • Lee Jun-Ha;Lee Hoong-Joo
    • Transactions on Electrical and Electronic Materials
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    • v.5 no.6
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    • pp.211-214
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    • 2004
  • We developed a new systematic calibration procedure which was applied to the calibration of the diffusivity, segregation and TED model of the indium impurity. The TED of the indium impurity has been studied using 4 different groups of experimental conditions. Although the indium is susceptible to the TED, the RTA is effective to suppress the TED effect and maintain a steep retrograde profile. Like the boron, the indium shows significant oxidationenhanced diffusion in silicon and has segregation coefficients at the $Si/SiO_2$ interface much less than 1. In contrast, however, the segregation coefficient of indium decreases as the temperature increases. The accuracy of the proposed technique is validated by SIMS data and $0.13 {\mu}m$ device characteristics such as $V_{th}$ and $Id_{sat}$ with errors less than $5 \%$ between simulation and experiment.