• Journal of Educational Research in Mathematics
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• v.9 no.2
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• pp.383-404
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• 1999

This study began with an epistemological question about the nature of mathematical cognition in relation to the learner's activity. Therefore, by examining Piaget's 'reflective abstraction' theory which can be an answer to the question, we tried to get suggestions which can be given to the mathematical education in practice. 'Reflective abstraction' is formed through the coordination of the epistmmic subject's action while 'empirical abstraction' is formed by the characters of observable concrete object. The reason Piaget distinguished these two kinds of abstraction is that the foundation for the peculiar objectivity and inevitability can be taken from the coordination of the action which is shared by all the epistemic subjects. Moreover, because the mechanism of reflective abstraction, unlike empirical abstraction, does not construct a new operation by simply changing the result of the previous construction, but is forming re-construction which includes the structure previously constructed as a special case, the system which is developed by this mechanism is able to have reasonability constantly. The mechanism of the re-construction of the intellectual system through the reflective abstraction can be explained as continuous spiral alternance between the two complementary processes, 'reflechissement' and 'reflexion'; reflechissement is that the action moves to the higher level through the process of 'int riorisation' and 'thematisation'; reflexion is a process of 'equilibration'between the assimilation and the accomodation of the unbalance caused by the movement of the level. The operational learning principle of the theorists like Aebli who intended to embody Piaget's operational constructivism, attempts to explain the construction of the operation through 'internalization' of the action, but does not sufficiently emphasize the integration of the structure through the 'coordination' of the action and the ensuing discontinuous evolvement of learning level. Thus, based on the examination on the essential characteristic of the reflective abstraction and the mechanism, this study presents the principles of teaching and learning as following; $\circled1$ the principle of the operational interpretation of knowledge, $\circled2$ the principle of the structural interpretation of the operation, $\circled3$ the principle of int riorisation, $\circled4$ the principle of th matisation, $\circled5$ the principle of coordination, reflexion, and integration, $\circled6$ the principle of the discontinuous evolvement of learning level.

• Journal of information and communication convergence engineering
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• v.11 no.2
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• pp.112-117
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• 2013

In order to reuse a register transfer level (RTL)-based IP block, it takes another architectural exploration in which the RTL will be put, and it also takes virtual platforms to develop the driver and applications software. Due to the increasing demands of new technology, the hardware and software complexity of organizing embedded systems is growing rapidly. Accordingly, the traditional design methodology cannot stand up forever to designing complex devices. In this paper, I introduce an electronic system level (ESL)-based approach to designing complex hardware with a derivative of SystemVerilog. I adopted the concept of reuse with higher levels of abstraction of the ESL language than traditional HDLs to design multiplication server farms. Using the concept of ESL, I successfully implemented server farms as well as a test bench in one simulation environment. It would have cost a number of Verilog/C simulations if I had followed the traditional way, which would have required much more time and effort.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.6
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• pp.1-10
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• 1997

By considering low power design at higher levels of abstraction rather than at lower levels of abstraction, we can apply various transformation techniques to a system design with wider view and obtain much more effective power reduction with less cost and effort. In this paper, a transformation technique, called power - conscious loop folding is proposed for high level synthesis of a low power system.Our work is focused on reducing the power consumed by functional units in adata path dominated circuit through the decrease of switching activity. Te transformation algorithm has been implemented and integrated into HYPER, a high level synthesis system for experiments. In our experiments, we could achieve a pwoer reduction of up to 50% for data path dominated circuits.

• Journal of KIISE:Software and Applications
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• v.28 no.5
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• pp.389-401
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• 2001

This paper proposes an abstraction mechanism of the low-level digital video features for the automatic retrievals of the explosion scenes from the digital video library. In the proposed abstraction mechanism, the regional dominant colors of the key frame and the motion energy of the shot are defined as the primary abstractions of the shot for the explosion scene retrievals. It is because an explosion shot usually consists of the frames with a yellow-tone pixel and the objects in the shot are moved rapidly. The regional dominant colors of shot are selected by dividing its key frame image into several regions and extracting their regional dominant colors, and the motion energy of the shot is defined as the edge image differences between key frame and its neighboring frame. The edge image of the key frame makes the retrieval of the explosion scene more precisely, because the flames usually veils all other objects in the shot so that the edge image of the key frame comes to be simple enough in the explosion shot. The proposed automatic retrieval algorithm declares an explosion scene if it has a shot with a yellow regional dominant color and its motion energy is several times higher than the average motion energy of the shots in that scene. The edge image of the key frame is also used to filter out the false detection. Upon the extensive exporimental results, we could argue that the recall and precision of the proposed abstraction and detecting algorithm are about 0.8, and also found that they are not sensitive to the thresholds. This abstraction mechanism could be used to summarize the long action videos, and extract a high level semantic information from digital video archive.

• Journal of the Institute of Convergence Signal Processing
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• v.11 no.2
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• pp.177-182
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• 2010

The flow of a universal system-level design methodology consists of system specification, system-level hardware/software partitioning, co-design, co-verification using virtual or physical prototype, and system integration. In the developing process of a hardware component in system, the design phase has been regarded as a phase consuming lots of time and cost. However, the verification phase in which functionality of the designed component is verified has recently been considered as a much important phase. In this paper, the implementation of a verification environment which is based on SystemC infrastructure and verifies the functionality of a hardware component is described. The proposed verification system uses SystemC user-defined channel as communication interface between variables of SystemC module and registers of Verilog module. The functional verification of an UART is performed on the proposed verification system. SystemC provides class library for hardware modeling and has an advantage of being able to design a system consisting hardware and software in higher abstraction level than register transfer level. Source codes of SystemC modules are reusable with a minor adaptation on verifying functionality of another hardware component.

• International journal of advanced smart convergence
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• v.5 no.3
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• pp.8-15
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• 2016

In recent years, one of deep learning models called Deep Belief Network (DBN) which formed by stacking restricted Boltzman machine in a greedy fashion has beed widely used for classification and recognition. With an ability to extracting features of high-level abstraction and deal with higher dimensional data structure, this model has ouperformed outstanding result on image and speech recognition. In this research, we assess the applicability of deep learning in dna classification level. Since the training phase of DBN is costly expensive, specially if deals with DNA sequence with thousand of variables, we introduce a new encoding method, using decimal-binary vector to represent the sequence as input to the model, thereafter compare with one-hot-vector encoding in two datasets. We evaluated our proposed model with different contrastive algorithms which achieved significant improvement for the training speed with comparable classification result. This result has shown a potential of using decimal-binary vector on DBN for DNA sequence to solve other sequence problem in bioinformatics.

• Journal of Computing Science and Engineering
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• v.2 no.4
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• pp.340-356
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• 2008

The cognitive constraints of the human mind must drive the decisions in architecture and methodology design in order that the systems we build are comprehensible. This paper presents a methodology for the design of time-triggered embedded systems that leads to understandable artifacts. We lift the design process to a higher level of abstractionto the level of computational components that interact solely by the exchange of messages. The time-triggered architecture makes it possible to specify the temporal properties of component interfaces precisely and provides temporally predictable message communication, such that the precise behavior of a large design can be studied in the early phases of a design on the basis of the component interface specifications. This paper shows how the cognitive simplification strategies of abstraction, partitioning and segmentation are supported by the time-triggered architecture and its associated design methodology to construct evolvable embedded systems that can be readily understood and modified.

• Journal of Educational Research in Mathematics
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• v.8 no.2
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• pp.485-494
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• 1998

This study is on the theory of Piaget's reflective abstraction and the mechanism of the development of knowledge and the history of algebra and its application to understand the difficulties that many students have in learning algebra. Piaget considers the development of knowledge as a linear process. The stages in the construction of different forms of knowledge are sequential and each stage begins with reorganization. The reorganization consists of the projection onto a higher level from the lower level and the reflection which reconstructs and reorganizes within a lager system that is transferred by profection. Piaget shows that the mechanisms mediating transitions from one historical period to the next are analogous to those mediating the transition from one psychogenetic stage to the next and characterizes the mechanism as the intra, inter, trans sequence. The historical development of algebra is characterized by three periods, which are intra inter, transoperational. The analysis of the history of algebra by the mechanism explains why the difficulties that students have in learning algebra occur and shows that the roles of teachers are important to help students to overcome the difficulties.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.1339-1342
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• 2002

It is difficult to design system software to meet a better separation of concerns, which can provide a number of benefits such as adaptability, extensibility, and modularity in the design and implementation. During design, some aspectual properties, such as synchronization, scheduling, performance and fault tolerance, crosscut the basic functionalities of the system software. By separating functional components from the different aspectual components of the system software in the design, we can provide a better generic design model of system software. Aspect-Oriented Programming is a methodology that aims at separating components and aspects from the early stages of the software life cycle, and using techniques to combining them together at the implementation phase. In this paper we discuss an aspect-oriented framework that can simplify system software design and implementation by expressing it at a higher level of abstraction. Our work concentrates on how to achieve a higher separation of aspectual components, functional components, and layers from each other. Our goal is to achieve a better design model for implementing system software in terms of modularity, reusability and adaptability.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.5
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• pp.1-17
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• 1997

With the increasing performance and density of VLSI scircuits as well as the popularity of portable devices such as personal digital assitance, power consumption has emerged as an important issue in the design of electronic systems. Low power design techniqeus have been pursued at all design levels. However, it is more effective to attempt to reduce power dissipation at higher levels of abstraction which allow wider view. In this paper, we propose a simultaneous scheduling and binding scheme which increases the correlation between cosecutive inputs to an operation so that the switched capacitance of execution units is reduced in datapath-dominated circuits. The proposed method is implemented and integrated into the scheduling and assignment part of HYPER synthesis environment. Compared with original HYPER synthesis system, average power saving of 23.0% in execution units and 14.2% in the whole circuits, ar eobtained for a set of benchmark examples.