• Journal of Advanced Navigation Technology
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• v.6 no.1
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• pp.44-51
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• 2002

This paper describes the performance evaluation and analysis of an Orthogonal Frequency-Division Multiplexing (OFDM) system having the least Inter Symbol Interference (ISI) in a multi-path fading channel environment. Wireless Local Area Network (W-LAN) in accordance with IEEE 802.11a and IEEE 802.11b provides high-speed transmission to universities, businesses and other various places. In addition, service providers can offer a public W-LAN service on restricted areas such as a subway. The proliferation of W-LAN has led to greater W-LAN service demands, but problems are also on the rise in offering a good W-LAN service. In particular, urban areas with high radio wave interference and many buildings are vulnerable to deteriorated QoS including disconnected data and errors. For example, when high-speed data is transmitted in such areas, the relatively high frequency generates ISI between Access Points (AP) and Mobile Terminals (such as a notebook computer), leading to a frequency selective fading channel environment. Consequently, it is difficult to expect a goodW-LAN service. The simulation proves that the OFDM system enables W-LAN to implement QoS in high-speed data transmission in a multi-path fading channel environment. The enhanced OFDM performance with 52 sub-carriers is verified via data modulation methods such as BPSK, QPSK and 16QAM based on IEEE 802.11a and punched convolutional codes with code rate of 1/2 and 3/4 and constraint length of 7. Especially, the simulation finds that the OFDM system has better performance and there is no data disconnection even in a mobile environment by applying a single tap equalizer and a decision feedback equalizer to a mobile channel environment with heavy fading influence. Given the above result, the OFDM system is an ideal solution to guarantee QoS of the W-LAN service in a high-speed mobile environment.

• Journal of Advanced Navigation Technology
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• v.6 no.1
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• pp.37-43
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• 2002

This paper describes the performance evaluation and analysis of Wireless Local Area Network (W-LAN) in the 5 GHz ISM-band in compliance with IEEE 802.11a. At present, most W-LAN products are based on 2.4 GHz band, but low speed (11Mbps) has the limitation to serve systems demanding high-speed data transmission. To solve this problem, it is necessary to design next generation W-LAN system with 54Mbps in the 5GHz. It is sure that implementation of next generation W-LAN will bring competitive advantages. In particular, it will support telecommunications for high-speed mobile environments as well as for fixed places such as a school zone, a lecture room, a hospital and other premises. A few simulation methods are applied to more accurate and reliable performance analysis of next generation W-LAN. To verify if continuous data service is supported for a high-speed mobile notebook, multi-path fading channels between wireless Access Point (AP) and wireless Network Interface Card (NIC) are modeled. In addition, low interference is analyzed via convolutional codes and Orthogonal Frequency-Division Multiplexing (OFDM). Also, to obtain reliable Bit Error Rate (BER), a single tap Least Mean Square (LMS) equalizer is applied. Given the above simulation, next generation W-LAN is an ideal solution for continuous data transmission in high-speed mobile environments.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.38 no.6
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• pp.11-17
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• 2001

Design and implementation of the MAC protocol processor prototype for high speed wireless LAN, which has interface with 5GHz OFDM PHY layer, is presented. We analyze the IEEE 802.11 MAC protocol specification and then separate the MAC protocol functions to be implemented by hardware and firmware and define the interface in which frames can be exchanged. That is, it is considered that high speed queue processing and interfaces with RISC processor and OFDM PHY layer. Protocol control and transmission/reception functions of the MAC functions are implemented in hardware in order to guarantee high speed processing in MAC layer. The developed MAC hardware block operates at 10MHz main clock. Therefore, transmission rate in PHY layer is about 80Mbps because data transmission/reception between MAC layer and PHY layer is performed as unit of octet. The designed FPGA MAC function chip has been implemented in wireless LAN test board and it is verified that DCF function is operated correctly.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.1
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• pp.61-66
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• 2001

In this paper, we design high speed Viterbi decoding algorithm which is aimed for Wireless LAN. Wireless LAN transmits data at rate 6∼54 Mbps. This high speed is not easy to implement Viterbi decoder with single ACS. So parallel ACS butterfly structure is to be used and several time-dependent problem is to be solved. We simulate Viterbi algorithm using new branch metric calculating method to save time, and consider trace back algorithm which is adaptable to high speed Viterbi decoder. With simulated, we determine the structure of Viterbi decoder. This architecture is available to high speed and low power Viterbi decoder.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.6A
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• pp.510-516
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• 2005

In this paper, we discuss parameters of line code and simulate a same optical ethernet having minimum bandwidth(MB810) and non-minimum bandwidth line code(8B/10B) to present the possibility of improving of transmission performance using minimum bandwidth line code on the high speed optical ethernet. We design the high speed optical ethernet using Serial type LAN PHY 10GBASE-E(WDM type LAN PHY 10GBASE-LX4) for the single(multi) channel link. To compare the transmission performance of MB810, 8B/10B line code we measure the bit error rate(BER) according to the received optical power of single and multi channel link.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.447-448
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• 2008

This paper presents a low-complexity design and implementation results of a multi-input multi-output (MIMO) orthogonal frequency division multiplexing (OFDM) symbol detector for high speed wireless LAN (WLAN) systems. The proposed spatial division multiplexing (SDM) symbol detector is designed by HDL and synthesized to gate-level circuits using 0.18um CMOS library. The total gate count for the symbol detector is 238K.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.16 no.5
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• pp.66-74
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• 2002

OFDM(Orthogonal Frequency Division Multiplexing)is a one of the nst promising digital modulation techniques adapted for Digital audio broadcasting or Digital TV since it is very robust against multipath fading channels. From 1997, since the OFDM technique was considered as the physical layer standard for the high data rate wireless LAN systems in the 5㎓ band, related studies have been studied actively. The key element to implement high data rate wireless LAN system using OFDM technique are IFFT and FFT modules. In this paper, new IFFT and FFT module are designed and implemented using current cut circuit based on the matrix-rounding process for the low-power consumptive operation and high-speed data processing. In addition to, we certify the available operation of the rounded IFFT/FFT module in the AWGN channel by using the BER performance simulation of IEEE 802.11TGa based OFDM modem with rounded IFFT/FFT module.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.6C
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• pp.594-601
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• 2003

High-speed WLAN(Wireless Local Area Network) systems operating in 5GHz band use OFDM transmission technique. OFDM technique transmits data in parallel and has many advantage compared with the serial transmission system-for example, robustness to time variance of channel. OFDM technique use the orthogonal multicarriers. The ICI(InterChannel Interference) caused by the orthogonality destruction between subcarriers. hamper the BER performance. In this paper, we propose the synchronization techniques for high-speed WLAN system designed to support user data rates up to 54Mbps at 5GHz. The proposed synchronization techniques are the reduced complexity structure having the similar performance compared with the conventional synchronization techniques.

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.253-256
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• 2001

This paper describes a high speed MAC(Media Access Control) function chip for IEEE 802.11 MAC layer protocol. The MAC chip has control registers and interrupt scheme for interface with CPU and deals with transmission/reception of data as a unit of frame. The developed MAC chip is composed of protocol control block, transmission block, and reception block which supports the BCF function in IEEE 802.11 specification. The test suite which is adopted in order to verify operation of the MAC chip includes various functions, such as RTS-CTS frame exchange procedure, correct IFS(Inter Frame Space)timing, access procedure, random backoff procedure, retransmission procedure, fragmented frame transmission/reception procedure, duplicate reception frame detection, NAV(Network Allocation Vector), reception error processing, broadcast frame transmission/reception procedure, beacon frame transmission/reception procedure, and transmission/reception FIEO operation. By using this technique, it is possible to reduce the load of CPU and firmware size in high speed wireless LAN system.

• Electronics and Telecommunications Trends
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• v.18 no.6 s.84
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• pp.1-7
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• 2003

현재 이용되고 있는 이동통신 시스템은 기지국 구축 비용이 높아 무선 인터넷의 이용 요금이 높고 단말기 화면이 작기 때문에 콘텐츠의 제약이 발생하는 등 문제점이 존재하여 초고속 무선인터넷을 제공하기에는 한계가 있다. 그리고, 기존에 사용되고 있는 ISM 대역을 이용한 무선 LAN 기술은 홈 LAN 등에는 가능하나 전파간섭, 좁은 사용영역 등으로 공중서비스 제공에 역시 한계가 있다. 이를 위해서 무선 LAN보다 셀 크기가 크고 중저속의 이동성을 지원하면서 심리스(seamless)한 서비스를 제공할 수 있는 초고속 휴대용 인터넷(High-speed Portable internet: HPi) 시스템이 절실히 요구되고 있다. 이와 같이 급증하는 무선 인터넷 서비스 요구에 효과적으로 대처하기 위한, 휴대성과 이동성이 보장되며 저렴한 요금을 지향하는 새로운 형태의 무선데이터 시스템인 초고속 휴대용 인터넷 시스템 기술에 관련된 국내외 기술 및 표준화 동향을 설명하고, 서비스 특징, HPi 시스템 구조 및 기능 등에 대하여 기술한다.