• Electronics and Telecommunications Trends
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• v.38 no.1
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• pp.36-45
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• 2023

The increasing demand for ultra-high efficiency of compact power conversion systems for electric vehicle applications has brought GaN power semiconductors to the fore due to their low conduction losses and fast switching speed. In particular, the development of materials and core device processes contributed to remarkable results regarding the publication of vertical GaN power devices with high breakdown voltage. This paper reviews recent advances on GaN material technology and vertical GaN power device technology. The GaN material technology covers the latest technological trends and GaN epitaxial growth technology, while the vertical GaN power device technology examines diodes, Trench FETs, JFETs, and FinFETs and reviews the vertical GaN PiN diode technology developed by ETRI.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.16 no.1
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• pp.35-43
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• 2002

In the last decade, considerable efforts have been made to make a new class of solid state high power, high speed electronic device, namely, the Photo-Conductive Power Switch(PCPS), and to characterize the high-field performance of PCPS under high power, high voltage conditions. But the problem of surface flashover phenomena persist, preventing the realization of reliable and efficient high-speed, high voltage switching devices. It is essential to have a clear understanding on the physical processes behind the surface flashover problem to develop new technologies and device architectures so as to fabricate PCPS that are capable of high-field high-voltage. Also, it is imperative to identify new materials that could satisfy the requirements for high-field, high-power devices. Since surface flashover, surface breakdown phenomena is observed for all the devices that foiled at the applied field much lower than semiconductor bulk breakdown field, surface passivation is considered one of the important practical methods to improve the high field performance of the devices. Therefore, this paper was studied the main properties and mechanism of the semiconductor surface flashover before and after passivation under high electric-field.

• Journal of Information Display
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• v.8 no.2
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• pp.10-14
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• 2007

A blazed $GxL^{TM}$ device is described as having high optical efficiency (> 70% for RGB lasers), and high contrast ratio (> 10,000:1), and that is highly reliable when used in a large-area laser projection system. It has a robust design and precise stress control technology to maintain a uniform shape (bow and tilt) of more than 6,000 ribbons, a $0.25-{\mu}m$ CMOS compatible fabrication processing and planarization techniques to reduce fluctuation of the ribbons, and a reliable Al-Cu reflective film that provided protection against a high-power laser. No degradation in characteristics of the GxL device is observed after operating a 5,000- lumen projector for 2,000 hours and conducting 2,000 temperature cycling tests at $-20^{\circ}C$ and $+80^{\circ}C$. At the 2005 World Exposition in Aichi, Japan the world's largest laser projection screen with a size of 2005 inches (10 m ${\times}$ 50 m) and 6 million pixels (1,080 ${\times}$ 5,760) was demonstrated.

• The Transactions of the Korean Institute of Power Electronics
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• v.28 no.1
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• pp.39-47
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• 2023

This paper applies a structural technique with uniform parallel switch characteristics in gates and power loops to minimize the ringing and current imbalance that occurs when a general discrete package (TO-247)-based power semiconductor device is operated in parallel. Also, this propose a heat sink integrated switching module with heat sink design flexibility and high power density. The developed heat dissipation-integrated switching module verifies the symmetry of the parasitic inductance of the parallel switch through Q3D by ansys and the validity of the structural technique of the parallel switch using the LLC resonant converter experiment operating at a rated capacity of 7.5 kW.

• The Transactions of the Korean Institute of Power Electronics
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• v.23 no.5
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• pp.299-304
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• 2018

An ideal circuit breaker should supply electric power to loads without losses in a conduction state and completely isolate the load from the power source by providing insulation strength in a break state. Fault current is relatively easy to break in an Alternating Current (AC) circuit breaker because the AC current becomes zero at every half cycle. However, fault current in DC circuit breaker (DCCB) should be reduced by generating a high arc voltage at the breaker contact point. Large fire may occur if the DCCB does not take sufficient arc voltage and allows the continuous flow of the arc fault current with high temperature. A semiconductor circuit breaker with a power electronic device has many advantages. These advantages include quick breaking time, lack of arc generation, and lower noise than mechanical circuit breakers. However, a large load capacity cannot be applied because of large conduction loss. An extinguishing technology of DCCB with polymeric positive temperature coefficient (PPTC) device is proposed and evaluated through experiments in this study to take advantage of low conduction loss of mechanical circuit breaker and arcless breaking characteristic of semiconductor devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.357-360
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• 2003

In this paper, we designed 4.5kV/1.5kA IGCT devices. GCT thyristor has many superior characteristics compared with GTO thyristor, for examples; snubberless turn-off capability, short storage time, high turn-on capability, small turn-off gate charge and low total power loss of the application system containing device and peripheral parts such as anode reactor and snubber capacitance. In this paper we designed GCT thyristor devices, and analyzed static and dynamic characteristics of GCT thyristor depending on the minority carrier lifetime, n-base thickness and doping concentration of n-base region, respectively. Especially, turn-on and turn-off characteristics are very important characteristics for GCT thyristor devices. So, we considered above characteristic for design and analysis of GCT devices.

• Journal of the Semiconductor & Display Technology
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• v.22 no.1
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• pp.28-32
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• 2023

Recently, the use of stable lithium nanostructures as substrates and electrodes for secondary batteries can be a fundamental alternative to the development of next-generation system semiconductor devices. However, lithium structures pose safety concerns by severely limiting battery life due to the growth of Li dendrites during rapid charge/discharge cycles. Also, enabling long cyclability of high-voltage oxide cathodes is a persistent challenge for all-solid-state batteries, largely because of their poor interfacial stabilities against oxide solid electrolytes. For the development of next-generation system semiconductor devices, solid electrolyte nanostructures, which are used in high-density micro-energy storage devices and avoid the instability of liquid electrolytes, can be promising alternatives for next-generation batteries. Nevertheless, poor lithium ion conductivity and structural defects at room temperature have been pointed out as limitations. In this study, a low-dimensional Graphene Oxide (GO) structure was applied to demonstrate stable operation characteristics based on Li+ ion conductivity and excellent electrochemical performance. The low-dimensional structure of GO-based solid electrolytes can provide an important strategy for stable scalable solid-state power system semiconductor applications at room temperature. The device using uncoated bare NCA delivers a low capacity of 89 mA h g-1, while the cell using GO-coated NCA delivers a high capacity of 158 mA h g−1 and a low polarization. A full Li GO-based device was fabricated to demonstrate the practicality of the modified Li structure using the Li-GO heterointerface. This study promises that the lowdimensional structure of Li-GO can be an effective approach for the stabilization of solid-state power system semiconductor architectures.

• Journal of the Semiconductor & Display Technology
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• v.13 no.4
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• pp.55-58
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• 2014

The next-generation AlGaN/GaN HEMT power devices need higher power at higher frequencies. To know the device characteristics, the simulation of those devices are made. This paper presents a simulation study on the DC and RF characteristics of AlGaN/GaN HEMT power devices. According to the reduction of gate length from $2.0{\mu}m$ to $0.1{\mu}m$, the simulation results show that the drain current at zero gate voltage increases, the gate capacitance decreases, and the maximum transconductance increases, and thus the cutoff frequency and the maximum oscillation frequency increase. The maximum oscillation frequency maintains higher than the cutoff frequency, which means that the devices are useful for power devices at very high frequencies.

• The Transactions of the Korean Institute of Power Electronics
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• v.15 no.4
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• pp.274-281
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• 2010

This paper proposes a DFPS (Dual Frequency Power Source) impedance matching device for uniformity improvement of a semiconductor plasma etching system. The DFPS consists of two parts for safe plasma processing on large-area substrates. The first part is an ICP (Inductively Coupled Plasma) for high integration by using ferrite core. The second part is a CCP (Capacitive Coupled Plasma) to control uniformity of whole cells. Proposed DFPS can achieve high productivity improvement required for semiconductor equipment industry. The proposed plasma system is analyzed, simulated and experimentally verified with a matching equipment at 27.12MHz and 400kHz.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.4
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• pp.213-217
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• 2015

Device model parameters are very important for accurate estimation of electrical performances in devices, integrated circuits and their systems. There are a large number of methods for extraction of model parameters in power MOSFETs. For high efficiency, design is important considerations of a power MOSFET with high-voltage applications in consumer electronics. Meanwhile, it was proposed that the efficiency of a MOSFET can be enhanced by conducting JFET region double implant to reduce the On-resistance of the transistor. This paper reports the effects of JFET region double implant on the electrical properties and the decreasing On-resistance of the MOSFET. Experimental results show that the 1st JFET region implant diffuse can enhance the On-resistance by decreasing the ion concentration due to the surface and reduce the On-resistance by implanting the 2nd Phosphorus to the surface JFET region.