• 제목/요약/키워드: high power PFC

검색결과 259건 처리시간 0.027초

선택적 주파수 변환방식에 의한 단상 역률보상회로의 캐패시터전압 및 입력전류 고조파왜곡의 감소 (REDUCTION OF VOLTAGE STRESS AND INPUT CURRENT HARMONIC DISTORTION IN SINGLE STAGE PFC CONVERTER BY SELECTIVE VARIABLE FREQUENCY CONTROL)

  • 최항석;이규찬;조보형
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1997년도 하계학술대회 논문집 F
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    • pp.1999-2001
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    • 1997
  • The main two drawbacks of the Sin91e Stage PFC (SS-PFC) converters employing a DCM Boost PFC cell are relatively high voltage stress on the bulk capacitor and the input current harmonic distortion. The high voltage stress on bulk capacitor makes the SS-PFC converter impractical in a universal input application and the input current harmonic distortion lowers power factor. In this paper a selective variable frequency control that reduces the voltage stress on the bulk capacitor and the input current harmonic distortion is proposed. Computer simulation results of the proposed control method are presented.

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역률 보정회로(PFC)를 이용한 출력 가변형 정류기 개발에 관한 연구 (A Development of Variable Output type Rectifier by PFC)

  • 이춘모;장용주
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 학술대회 논문집 전문대학교육위원
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    • pp.70-74
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    • 2003
  • The buck-boost converter is employed as the variable output PFC power stage. From the loss analysis, this topology has a high efficiency from light load to heavy load. A modified input current sensing scheme is presented to overcome the problem of the insufficient phase margin for the PFC circuit near the maximum output voltage. The variable output PFC circuit has a good performance in the wide output voltage range, under both the Boost mode when the output voltage is high and the Buck+Boost mode when the output voltage is low.

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A High Performance Interleaved Bridgeless PFC for Nano-grid Systems

  • Cao, Guoen;Lim, Jea-Woo;Kim, Hee-Jun;Wang, Huan;Wang, Yibo
    • Journal of Electrical Engineering and Technology
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    • 제12권3호
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    • pp.1156-1165
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    • 2017
  • A high performance interleaved bridgeless boost power factor correction (PFC) rectifier operating under the critical current conduction mode (CrM) is proposed in this paper to improve the efficiency and system performance of various applications, such as nano-grid systems. By combining the interleaved technique with the bridgeless topology, the circuit contains two independent branches without rectifier diodes. The branches operate in interleaved mode for each respective half-line period. Moreover, when operating in CrM, all the power switches take on soft-switching, thereby reducing switching losses and raising system efficiency. In addition, the input current flows through a minimum amount of power devices. By employing a commercial PFC controller, an effective control scheme is used for the proposed circuit. The operating principle of the proposed circuit is presented, and the design considerations are also demonstrated. Simulations and experiments have been carried out to evaluate theoretical analysis and feasibility of the proposed circuit.

GaN FET을 이용한 토템폴 구조의 브리지리스 부스트 PFC 컨버터 (Totem-pole Bridgeless Boost PFC Converter Based on GaN FETs)

  • 장바울;강상우;조보형;김진한;서한솔;박현수
    • 전력전자학회논문지
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    • 제20권3호
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    • pp.214-222
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    • 2015
  • The superiority of gallium nitride FET (GaN FET) over silicon MOSFET is examined in this paper. One of the outstanding features of GaN FET is low reverse-recovery charge, which enables continuous conduction mode operation of totem-pole bridgeless boost power factor correction (PFC) circuit. Among many bridgeless topologies, totem-pole bridgeless shows high efficiency and low conducted electromagnetic interference performance, with low cost and simple control scheme. The operation principle, control scheme, and circuit implementation of the proposed topology are provided. The converter is driven in two-module interleaved topology to operate at a power level of 5.5 kW, whereas phase-shedding control is adopted for light load efficiency improvement. Negative bias circuit is used in gate drivers to avoid the shoot-through induced by high speed switching. The superiority of GaN FET is verified by constructing a 5.5 kW prototype of two-module interleaved totem-pole bridgeless boost PFC converter. The experiment results show the highest efficiency of 98.7% at 1.6 kW load and an efficiency of 97.7% at the rated load.

고출력 MHL 전자식 안정기에 적합한 수동 PFC 회로 설계 (Passive PFC Circuit Design for the High Power MHL Electronic Ballast)

  • 박종연;이봉진;김기남
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 제38회 하계학술대회
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    • pp.1077-1078
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    • 2007
  • 본 논문은 고출력 MHL(Metal Halide Lamp) 전자식 안정기에 적합한 새로운 형태의 수동 PFC 회로를 제안하였다. 제안한 수동 PFC 회로는 저단가로 구현할 수 있으며 수동 소자의 사용으로 인해 신뢰성을 향상시켰다. 또한 기존의 수동 PFC 회로보다 입력 전류의 THD 및 역률을 개선하였다. 제안된 수동 PFC 회로에 사용된 소자값의 결정 방법을 수식적으로 제시하였으며 P-spice를 이용한 컴퓨터 시뮬레이션 및 1000W MHL 전자식 안정기에 실제 적용한 실험을 통하여 제안된 수동 PFC의 성능을 증명하였다.

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고역률 스텝 업-다운 절연형 AC-DC 컨버터의 입력전류 파형분석에 관한 연구 (A Study on Input Current Waveform Analysis for Step Up-Down AC-DC Converter of High Power Factor added Electric Isolation)

  • 곽동걸;김춘삼;이봉섭;김상훈
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2008년도 하계학술대회 논문집
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    • pp.34-36
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    • 2008
  • This paper is given a full detail of mathematical analyses of input current for novel active type power factor correction(PFC) AC-DC converter of step up-down added electric isolation. These are compared with harmonics components of input current for a conventional PFC converter of electric isolation type. The proposed PFC converter is constructed in using a new loss-less snubber circuit to achieve a soft switching of control device. Also the proposed converter for discontinuous conduction mode(DCM) eliminates the complicated circuit control requirement and reduces the size of components. The input current waveform in the proposed converter is got to be a sinusoidal form of discontinuous pulse in proportion to magnitude of ac input voltage under the constant duty cycle switching. Therefore, input power factor is nearly unity and the control method is simple. Particularly, the stored energy of loss-less snubber capacitor is recovered with input side and increases input current from resonant operation. The result is that input power factor of the proposed converter is higher than that of a conventional PFC converter. Some simulative results on computer and experimental results are included to confirm the validity of the analytical results.

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전기자동차용 배터리 충전기 (Battery Charger for EV)

  • 윤수영;채형준;김원용;문형태;정유석;이준영
    • 전력전자학회논문지
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    • 제15권6호
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    • pp.460-465
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    • 2010
  • 최근 화석 연료의 고갈과 이산화탄소 배출 제한으로 인하여 내연기관 자동차에서 전기 자동차로의 대한 관심이 높아지고 있다. 전기 자동차 에너지 저장 요소인 배터리 충전에 필요한 AC-DC 컨버터가 필요하며 컨버터의 필요조건 으로 넓은 출력 전압 범위, 고효율, 높은 역률 등을 들수 있다. 넓은 전압 범위와 절연을 위해 2단 구성 하였다. 앞단은 LLC 컨버터를 후단은 역률을 고려 하여 BOOST 컨버터를 이용한 PFC 회로를 구현하여 실험적으로 확인 하였다.

개선된 AC/DC PFC ZVT Boost 컨버터 (Improved AC/DC PFC ZVT Boost Converter)

  • 유종규;김용;배진용;이은영;조규만
    • 조명전기설비학회논문지
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    • 제19권8호
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    • pp.62-69
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    • 2005
  • 본 논문에서는 보조 스위치의 하드 스위칭 문제를 개선한 AC/DC PFC(Power-Factor-Correction) ZVT(Zero-Voltage-Transition) Boost 컨버터에 관하여 논하였다. 기존의 AC/DC PFC ZVT Boost 컨버터는 주 스위치 턴온 시 보조 스위치를 함께 동작시켜 경부하시에도 강제적으로 영전압 스위칭이 가능하게 함으로써 전 부하범위에서 주 스위치 손실을 저감하였다. 그러나 보조 스위치에서의 손실이 크며 주 스위치의 턴온시 역방향 전류가 증가하는 문제점을 지닌다. 따라서 본 연구에서는 기존의 ZVT 컨버터에 단지 하나의 다이오드를 추가함으로써 보조 스위치의 전류 스트레스 및 주 스위치의 턴온시 역방향 전류를 감소시키게 되어 효율 향상을 기할 수 있었다. 본 논문에서는 MOSFET를 사용하여 640[W]급 시작품을 제작, 100[kHz]에서 실험하였다.

SMALL-SIGNAL MODEL FOR A CONTROLLED ON-TIME BOOST POWER FACTOR CORRECTION CIRCUIT

  • Kang, Yonghan;Choi, Byungcho
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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    • pp.642-647
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    • 1998
  • A new small-signal model for the controlled on-time boost power factor correction (PFC) circuit is presented. The proposed small-signal model is valid up to high frequencies over lKHz. The model can be used in designing the voltage feedback compensation of PFC circuits, the control bandwidth of which is maximized with auxiliary means of removing the low-frequency ripple from the output. The accuracy of the model is confirmed by a 200W experimental hardware

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A Series Arc Fault Detection Strategy for Single-Phase Boost PFC Rectifiers

  • Cho, Younghoon;Lim, Jongung;Seo, Hyunuk;Bang, Sun-Bae;Choe, Gyu-Ha
    • Journal of Power Electronics
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    • 제15권6호
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    • pp.1664-1672
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    • 2015
  • This paper proposes a series arc fault detection algorithm which incorporates peak voltage and harmonic current detectors for single-phase boost power factor correction (PFC) rectifiers. The series arc fault model is also proposed to analyze the phenomenon of the arc fault and detection algorithm. For arc detection, the virtual dq transformation is utilized to detect the peak input voltage. In addition, multiple combinations of low- and high-pass filters are applied to extract the specific harmonic components which show the characteristics of the series arc fault conditions. The proposed model and the arc detection method are experimentally verified through a boost PFC rectifier prototype operating under the grid-tied condition with an artificial arc generator manufactured under the guidelines for the Underwriters Laboratories (UL) 1699 standard.