• Title/Summary/Keyword: high frequency driver

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16-QAM-Based Highly Spectral-Efficient E-band Communication System with Bit Rate up to 10 Gbps

  • Kang, Min-Soo;Kim, Bong-Su;Kim, Kwang Seon;Byun, Woo-Jin;Park, Hyung Chul
    • ETRI Journal
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    • v.34 no.5
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    • pp.649-654
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    • 2012
  • This paper presents a novel 16-quadrature-amplitude-modulation (QAM) E-band communication system. The system can deliver 10 Gbps through eight channels with a bandwidth of 5 GHz (71-76 GHz/81-86 GHz). Each channel occupies 390 MHz and delivers 1.25 Gbps using a 16-QAM. Thus, this system can achieve a bandwidth efficiency of 3.2 bit/s/Hz. To implement the system, a driver amplifier and an RF up-/down-conversion mixer are implemented using a $0.1{\mu}m$ gallium arsenide pseudomorphic high-electron-mobility transistor (GaAs pHEMT) process. A single-IF architecture is chosen for the RF receiver. In the digital modem, 24 square root raised cosine filters and four (255, 239) Reed-Solomon forward error correction codecs are used in parallel. The modem can compensate for a carrier-frequency offset of up to 50 ppm and a symbol rate offset of up to 1 ppm. Experiment results show that the system can achieve a bit error rate of $10^{-5}$ at a signal-to-noise ratio of about 21.5 dB.

Design of a 2.5 Gbps CMOS optical transmitter with 10:1 serializer using clock generation method (Reference clock 생성기를 이용한 10:1 데이터 변환 2.5 Gbps 광 송신기 설계)

  • Kang, Hyung-Won;Kim, Kyung-Min;Choi, Young-Wan
    • 한국정보통신설비학회:학술대회논문집
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    • 2005.08a
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    • pp.159-165
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    • 2005
  • The proposed optical transmitter is composed of FF(flip flop) , PLL (phase locked loop), reference clock generator, serializer and LD driver 10x250 Mb/s data arrays are translated to the 2.5 Gb/s data signal by serializer. In this case, 1 data bus is allocated usually as a reference clock for synchronization. In this proposed optical transmitter, 125 MHz reference clock is generated from 10x250 Mb/s data arrays by reference clock generator. From this method. absent of reference clock bus is available and more data transmission become possible. To achieve high speed operation, the serializer circuit is designed as two stacks. For 10:1 serialization, 10 clocks that have 1/10 lambda differences is essential, so the VCO (voltage controlled oscillator) composed of 10 delay buffers is designed. PLL is for runing at 250 MHz, and dual PFD(phase frequency detector) is adopted for fast locking time. The optical transmitter is designed by using 0.35 um CMOS technology.

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Design of a Simmer Circuit for Xenon Flash Lamp Driver Based on a LCC Converter (LCC 컨버터 기반의 제논 플래시 램프 구동장치를 위한 시머회로 설계)

  • Song, Seung-Ho;Cho, Chan-Gi;Park, Su-Mi;Park, Hyun-Il;Bae, Jung-Su;Jang, Sung-Roc;Ryoo, Hong-Je
    • Proceedings of the KIPE Conference
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    • 2017.07a
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    • pp.231-232
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    • 2017
  • This paper describes the design and implementation of a 2.5kW (500V, 5A) simmer circuit that maintains the ionization of xenon gas inside the lamp. The design is based on a LCC resonant converter in continuous conduction mode (CCM) with above resonant frequency to take advantage of high power density from using parasitic elements such as the leakage inductance in a power transformer. In addition, since the converter has current source output characteristics, it is suitable for maintaining ionization of the lamp having the negative resistance load characteristic. To verify this converter design, PSpice modeling was performed. Finally, the developed simmer circuit is verified by a resistive load of rated performance and the Ionization maintenance operation of the xenon flash lamp.

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Ku-Band Three-Stack CMOS Power Amplifier to Enhance Output Power and Efficiency (출력 전력 및 효율 개선을 위한 3-스택 구조의 Ku 대역 CMOS 전력 증폭기)

  • Yang, Junhyuk;Jang, Seonhye;Jung, Hayeon;Joo, Taehwan;Park, Changkun
    • Journal of IKEEE
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    • v.25 no.1
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    • pp.133-138
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    • 2021
  • We propose a Ku-band three-stack CMOS power amplifier to enhance the output power and efficiency. To minimize the dc power consumption, the driver stage is designed using common-source structure. To obtain high output power and utilize a voltage combining method, the power stage is designed using stack structure. To verify the proposed power amplifier structure, we design a Ku-band power amplifier using 65-nm RFCMOS process which provide nine metal layers. The P1dB, power-added efficiency, and gain are higher than 20 dBm, 23 dB, and 25%, respectively, while the operating frequency is 14 GHz-16 GHz.

Analysis of Emission Characteristics of DC/DC Converter with different Parts Layout (부품배치가 다르게 제작된 DC/DC컨버터의 Emission 특성분석)

  • Park, Jin-Hong
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.20 no.1
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    • pp.179-183
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    • 2019
  • The system stability must be ensured from the switching noise due to the power conversion efficiency and power conversion system miniaturization. Therefore, countermeasures to reduce switching noise during power conversion are essential. Thus, in the previous paper, we constructed the DC / DC Buck Converter circuit using MPQ4432 driver of MPS, and simulated the switching noise characteristics which occurs when the components are arranged differently in the 4 - layer PCB circuit structure with reference plane. In this paper, two different simulated circuits are fabricated and the characteristics of the conducted emission and the radiated emission are analyzed in the same way as the simulation. As a result, it was confirmed that the Conducted Emission characteristic was reduced by 2 ~ 9dB in the low frequency band and 6 ~ 7dB in the high frequency band depending on the configuration of the current return path. And the radiated emission characteristic is reduced by 9 dB. Conducted emission simulation results show that 6 ~ 7dB in the low frequency range and 2 ~ 9dB in the measurement result are somewhat different. In the high frequency band, it is confirmed that the experimental and simulation results are about 7dB. And Radiated Emission confirmed 12dB decrease in simulation, but confirmed decrease of 9dB in measurement result. It is confirmed that there is a slight difference in the amount of reduction, but the design of the power conversion circuit improves the noise characteristics according to the configuration of the current return path.

A Low Area and High Efficiency SMPS with a PWM Generator Based on a Pseudo Relaxation-Oscillating Technique (Pseudo Relaxation-Oscillating 기법의 PWM 발생기를 이용한 저면적, 고효율 SMPS)

  • Lim, Ji-Hoon;Wee, Jae-Kyung;Song, Inchae
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.11
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    • pp.70-77
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    • 2013
  • We suggest a low area and high efficiency switched-mode power supply (SMPS) with a pulse width modulation (PWM) generator based on a pseudo relaxation-oscillating technique. In the proposed circuit, the PWM duty ratio is determined by the voltage slope control of an internal capacitor according to amount of charging current in a PWM generator. Compared to conventional SMPSs, the proposed control method consists of a simple structure without the filter circuits needed for an analog-controlled SMPS or the digital compensator used by a digitally-controlled SMPS. The proposed circuit is able to operate at switching frequency of 1MHz~10MHz, as this frequency can be controlled from the selection of one of the internal capacitors in a PWM generator. The maximum current of the core circuit is 2.7 mA, and the total current of the entire circuit including output buffer driver is 15 mA at 10 MHz switching frequency. The proposed SMPS has a simulated maximum ripple voltage of 7mV. In this paper, to verify the operation of the proposed circuit, we performed simulation using Dongbu Hitek BCD $0.35{\mu}m$ technology and measured the proposed circuit.

Development of a 3 kW Grid-tied PV Inverter With GaN HEMT Considering Thermal Considerations (GaN HEMT를 적용한 3kW급 계통연계 태양광 인버터의 방열 설계 및 개발)

  • Han, Seok-Gyu;Noh, Yong-Su;Hyon, Byong-Jo;Park, Joon-Sung;Joo, Dongmyoung
    • The Transactions of the Korean Institute of Power Electronics
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    • v.26 no.5
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    • pp.325-333
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    • 2021
  • A 3 kW grid-tied PV inverter with Gallium nitride high-electron mobility transistor (GaN HEMT) for domestic commercialization was developed using boost converter and full-bridge inverter with LCL filter topology. Recently, many GaN HEMTs are manufactured as surface mount packages because of their lower parasitic inductance characteristic than standard TO (transistor outline) packages. A surface mount packaged GaN HEMT releases heat through either top or bottom cooling method. IGOT60R070D1 is selected as a key power semiconductor because it has a top cooling method and fairly low thermal resistances from junction to ambient. Its characteristics allow the design of a 3 kW inverter without forced convection, thereby providing great advantages in terms of easy maintenance and high reliability. 1EDF5673K is selected as a gate driver because its driving current and negative voltage output characteristics are highly optimized for IGOT60R070D1. An LCL filter with passive damping resistor is applied to attenuate the switching frequency harmonics to the grid-tied operation. The designed LCL filter parameters are validated with PSIM simulation. A prototype of 3 kW PV inverter with GaN HEMT is constructed to verify the performance of the power conversion system. It achieved high power density of 614 W/L and peak power efficiency of 99% for the boost converter and inverter.

TPMS Interference Suppression Based on Beamforming (Beamforming을 이용한 TPMS 간섭제거)

  • Hwang, Suk-Seung;Kim, Seong-Min;Park, Cheol
    • The Journal of the Korea institute of electronic communication sciences
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    • v.6 no.2
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    • pp.180-185
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    • 2011
  • The TPMS(Tire Pressure Monitoring System) is an electronic system designed to display the air pressure inside the pneumatic tires and report real-time tire-pressure information to the driver of the vehicle, either via a gange, a pictogram display, or a simple low-pressure warning light. Although the data measured by TPMS sensor is transmitted to internal signal processer in a vehicle through wireless communication, the receiver may suffers from various interferences such as amateur radio station, RFID(Radio-Frequency IDentification) for controlling container, RKE(Remote Keyless Entry) signal, and so on. In this paper, we consider beamforming technology to suppress various high-power interference signals for the TPMS wireless communications. Also, we propose the proper data structure and antenna arrangement for the beamformer inside the vehicle. The performance for the interference suppression is illustrated by computer simulation example.

Delta Sigma Modulation of Controller Input Signal for the LED Light Driver (시그마 델타 변조에 의한 LED 드라이버의 입력 콘트롤러 설계)

  • Um, Kee-Hong
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.16 no.2
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    • pp.151-155
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    • 2016
  • In this paper, we present the LED dimming control system by using ADPCM (Adaptive Differential Pulse Code Modulation). This ADPCM apparatus accurately controls the LED current with high resolution reducing the RFI (radio frequency interference) due to the spreading out of the harmonics of current of pulses. Additionally, this makes it easier to increase the accuracy of control operation. This study introduces to make a digitally controlled circuit for controlling LED with high-energy efficient by adopting pulse current to LED. The LED current drive system we designed are two systems, the digitally-controlled unit and analog switching mode power supply unit, can be developed separately. The simulation shows the sigma delta modulation of digital to analog converter's output when the input level is 0.7. From this simulation, the output is approached to accurately 0.15% to target value with 510 pulses.

One-Chip Multi-Output SMPS using a Shared Digital Controller and Pseudo Relaxation Oscillating Technique (디지털 컨트롤러 공유 및 Pseudo Relaxation Oscillating 기법을 이용한 원-칩 다중출력 SMPS)

  • Park, Young-Kyun;Lim, Ji-Hoon;Wee, Jae-Kyung;Lee, Yong-Keun;Song, Inchae
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.1
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    • pp.148-156
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    • 2013
  • This paper suggests a multi-level and multi-output SMPS based on a shared digital logic controller through independently operating in each dedicated time periods. Although the shared architecture can be devised with small area and high efficiency, it has critical drawbacks that real-time control of each DPWM generators are impossible and its output voltage can be unstable. To solve these problems, a real-time current compensation scheme is proposed as a solution. A current consumption of the core block and entire block with four driver buffers was simulated about 4.9mA and 30mA at 10MHz switching frequency and 100MHz core operating frequency. Output voltage ripple was 11 mV at 3.3V output voltage. Over/undershoot voltage was 10mV/19.6mV at 3.3V output voltage. The noise performance was simulated at 800mA and 100KHz load regulation. Core circuit can be implemented small size in $700{\mu}m{\times}800{\mu}m$ area. For the verification of proposed circuit, the simulations were carried out with Dong-bu Hitek BCD $0.35{\mu}m$ technology.