• International Journal of Internet, Broadcasting and Communication
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• v.9 no.1
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• pp.29-34
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• 2017

Over the past several decades, embedded system and flight control computer technologies have been evolved to meet the diverse needs of the mobile device market. Current embedded systems are at the heart of technologies that can take advantage of small-sized specialized hardware while still providing high-efficiency performance at low cost. One of these key technologies is multiple memory banks. For example, a dual memory bank can provide two times more memory bandwidth in the same memory space. This benefit take lower cost to provide the same bandwidth. However, there is still few software technologies to support the efficient use of multiple memory banks. In this study, we present a technique to efficiently exploit multiple memory banks by software support. Specifically, our technique use an interference graph to optimally allocate data to different memory banks by an optimizing compiler. As a result, the execution time can be improved upto 7% with the proposed technique.

• Journal of international Conference on Electrical Machines and Systems
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• v.3 no.3
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• pp.325-330
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• 2014

Eddy current induction is used in a wide range of electronic devices, for example in detection sensors. Due to the advances in computer hardware and software, the need for 3D computation and system comprehension is a requirement to develop and optimize such devices nowadays. Pure theoretical models are mostly limited to special cases. On the other hand, the classical use of commercial Finite Element (FE) electromagnetic 3D models is not computationally efficient and lacks modeling flexibility or robustness. The proposed approach focuses on: (1) implementing theoretical formulations in 3D (FE) model of a detection device as well as (2) an automatic Volumetric Estimation Method (VEM) developed to selectively model the target finite elements. Due to these two approaches, this model is suitable for parametric studies and optimization of the number, location, shape, and size of PCB receivers in order to get the desired target discrimination information preserving high accuracy with tenfold reduction in computation time compared to commercial FE software.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.60 no.1
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• pp.37-44
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• 2011

HSPA(High Speed Packet Access)/HSPA+ is a combined 3GPP(Third Generation Partnership Project) standard of HSDPA(High Speed Downlink Packet Access) and HSUPA(High Speed Uplink Packet Access). The standard can provide the high speed multimedia service against the 3GPP release 99 standard. In order to test the 3GPP HSPA/HSPA+ terminal performance, the measurement hardware is required for the evaluate the transmitted signal of HSPA/HSPA+ terminals. Agilent Technologies and Innowireless produce the measurement equipments for HSPA/HSPA+ terminals. Generally speaking, the receiving algorithms in normal modems cannot be used directly to the measurement system due to the lack of the algorithm accuracy. In this paper, we propose the new receiver algorithm for precise measurement of 3GPP HSPA/HSPA+ terminal signal, and implement measurement functionality for performance measurement of the 3GPP HSPA/HSPA+ terminal by using software. The proposed 3GPP HSPA/HSPA+ signal measurement algorithm can be used for the commercial system through code execution speed optimization.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.218-223
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• 2002

광 디스크 드라이브에서의 서보 제어시스템에는 광 픽업에서 발생된 레이저 빔을 디스크 기록면의 데이터 트랙에 정확히 위치시키기 위한 제어 계를 갖고 있다. 광 디스크의 고배속화에 따른 외란의 주파수 대역의 증가에 따라 더욱 더 높은 샘플링 주파수로 레이저 빔의 위치 제어를 필요로 하게 되고, 여러 가지 알고리즘의 증가로 인해 DSP의 연산 부담은 증가하게 된다. 본 논문에서는 서보 제어에 필요한 알고리즘의 최적화된 하드웨어/소프트웨어 시스템을 구현하고 이를 이용한 실험 결과를 제시한다.

• Proceedings of the KAIS Fall Conference
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• 2009.05a
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• pp.620-623
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• 2009

프레임 단위로 처리하는 카메라 영상 처리 기술에는 AWB, AE, AF 등이 있으며, AF는 고가의 초점제어 장치를 필요로 하기 때문에, AWB와 AE만이 모든 카메라에 기본적으로 탑재되는 핵심기능이다. ODM은 AWB나 AE 동작을 위해서 필요한 파라미터를 프레임 단위로 계산하는 하드웨어 모듈을 지칭한다. 본 논문에서는 R, G, B 평균값으로부터 밝기값을 연산하는 수식을 단순화하고, AE ODM과 AWB ODM을 통합하여, AE와 AWB에서 필요로 하는 모든 가산/제산 연산을 단 한 개의 가산기와 제산기를 이용하여 구현되는 ODM 구조를 제안한다. 제안한 ODM 구조 최소한의 연산자만을 사용하도록 구현되기 때문에, ISP를 내장하는 저가형 이미지 센서에 적합한 특성을 가진다.

• Journal of Korea Game Society
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• v.1 no.1
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• pp.68-72
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• 2001

DirectX Graphics plays the role of hardware independent 3 dimensional drawing interface for 3 dimensional video display. However the APIs in DirectX Graphics provide not only small improvement in velocity in the lowest level but also unstable performance of velocity according to their usages. In this paper, we present the structure of 3D game engine of efficient performance and describe functions and implementational features of game engines for an efficient 3D rendering in the environment of DirecX Graphics.

• Journal of the Korea Computer Graphics Society
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• v.11 no.1
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• pp.40-49
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• 2005

Several optimization techniques have been proposed for volume ray casting, but these cannot achieve real-time frame rates. In addition, it is difficult to apply them to some applications that require perspective projection. Recently, hardware-based methods using 3D texture mapping are being used for real-time volume rendering. Although rendering speed approaches real time, the larger volumes require more swapping of volume bricks for the limited texture memory. Also, image quality deteriorates compared with that of conventional volume ray casting. In this paper, we propose a data structure for real-time volume ray casting named PERM (Precomputed dEnsity and gRadient Map). The PERM stores interpolated density and gradient vector for quantized cells. Since the information requiring time-consuming computations is stored in the PERM, our method can ensure interactive frame rates on a consumer PC platform. Our method normally produces high-quality images because it is based on conventional volume ray casting.

• Proceedings of the KSR Conference
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• 2000.05a
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• pp.324-329
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• 2000

Object of a real-time system, that performs exact information based on the real-time constraint. is required for an improvement of high reliability. The fault-tolerant task scheduling strategy of multiprocessor as using a distributed memory based on a hardware redundancy can be improved into a high reliability of the real-time system. Therefore, this paper is shown to analyze the reliability of the system by using the transfer parameter and make the modeling in reference to a minimization of the fault-tolerant task scheduling strategy which uses a percentage of task missing and deadline parameter based on optimization task size.

• IEMEK Journal of Embedded Systems and Applications
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• v.8 no.5
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• pp.255-264
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• 2013

Resolving of memory access latency is one of the most important problems in modern embedded system design. Recently, tons of studies are presented to reduce and hide the access latency. Burst/page data transfer modes are representative hardware techniques for achieving such purpose. The burst data transfer capability offers an average access time reduction of more than 65 percent for an eight-word sequential transfer. However, solution of utilizing such burst data transfer to improve memory performance has not been accomplished at commercial level. Therefore, this paper presents a new technique that provides the maximum utilization of burst transfer for memory accesses with local variables in code by reorganizing variables placement.

• Bulletin of the Korean Chemical Society
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• v.31 no.12
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• pp.3639-3643
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• 2010

We have developed CUDA-enabled version of a general purpose molecular dynamics simulation code for GPU. Implementation details including parallelization scheme and performance optimization are described. Here we have focused on the non-bonded force calculation because it is most time consuming part in molecular dynamics simulation. Timing results using CUDA-enabled and CPU versions were obtained and compared for a biomolecular system containing 23558 atoms. CUDA-enabled versions were found to be faster than CPU version. This suggests that GPU could be a useful hardware for molecular dynamics simulation.