• Title/Summary/Keyword: hardware and software

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Automatic Hardware/Software Interface Generation for Embedded System

  • Son, Choon-Ho;Yun, Jeong-Han;Kang, Hyun-Goo;Han, Tai-Sook
    • Journal of Information Processing Systems
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    • v.2 no.3 s.4
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    • pp.137-142
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    • 2006
  • A large portion of the embedded system development process involves the integration of hardware and software. Unfortunately, communication across the hardware/software boundary is tedious and error-prone to create. This paper presents an automatic hardware/software interface generation system. As the front-end of hardware/software co-design frameworks, a system designer defines XML specifications for hardware functions. Our system generates hardware/software interfaces including Device Driver, Driver API, and Device Controller from these specifications. Embedded software designers can easily use hardware just like system libraries. Our system reduces the mistakes and errors that can be occurred when a software programmer directly connects software to hardware, and supports balancing labors between hardware developers and software programmers. Moreover, this system can be used as the back-end for a hardware/software co-design framework.

Partioning for hardwae-software codesign (하드웨어-소프트웨어 통합 설계를 위한 분할)

  • 윤경로;박동하;신현철
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.7
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    • pp.261-268
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    • 1996
  • Hardware-software codesign becomes improtant to effectively sagisfy perfomrance goals, because designers can trade-off in the way hardware and software components work teogether to exhibit a specified behavior. In this paper, a hardware-software pratitioning algorithm is presetned, in which the system behavioral description containing a mixture of hardware and software components is partitioned into hardware part and software part. The partitioning algorithm tries to minimize the given cost function under constraints on hardware resources or latency. Recursive moving of operations between the hardware and software parts is used to find a near optimum partition and the list scheduling approach is used to estimate the hardware area and latency. Since memory may take substantial protion of the hardware part, memory cost is included in sthe hardware cost. Experimental resutls show that our algorithm is effective.

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A Framework for Product Development including HW and SW Components (하드웨어와 소프트웨어가 포함된 제품개발을 위한 프레임워크)

  • Do Nam-Cheol;Chae Gyeong-Seok
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2006.05a
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    • pp.1329-1333
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    • 2006
  • This paper proposes a framework for product development including hardware and software components. The framework provides separation of the hardware dependent software, an integrated product development process, and integration of software components with product configurations and product structures. In order to separates the hardware dependent software, the framework considers product configuration modules and engineering changes of associated hardware and software components. The proposed product development process integrates development of the hardware dependent software into the existing product development process. In order to integrates the hardware dependent software with product configurations and product structures, the framework represents software components by existing product data models in Product Data Management (PDM). The framework is applied to development of a robot system including hardware and software components in order to show its effectiveness.

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A Product Data Model for the Integration Module for Supporting Collaborations on Hardware and Software Development (소프트웨어 하드웨어 협동설계를 위한 통합모듈을 지원하는 제품자료모델)

  • Do, Namchul
    • Journal of Information Technology Services
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    • v.11 no.4
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    • pp.171-180
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    • 2012
  • Since software and hardware integration has became a strategic tool for companies to innovate their products, an information system that can comprehensively manage software and hardware integrated product development is critical for the current product development. This paper proposed a product data model that can support modules of related software and hardware parts in Product Data Management(PDM) integrated with Software Configuration Management(SCM). The model allows engineers to define software and hardware product structure independently, and support the integration module that can summon related software and hardware parts to build a comprehensive module for collaboration. Through the integration module, engineers can identify and examine the effectiveness of their design alternatives to other related parts form different disciplines. The product data model was implemented as a prototype PDM system and tested with an example robotics product.

A Research on the Relations between Mathematics/statistics and Software/Hardware Tracks (소프트웨어 및 하드웨어분야의 트랙과 수학/통계와의 연관성 정도 파악)

  • Lee, Seung-Woo
    • The Mathematical Education
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    • v.47 no.4
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    • pp.505-517
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    • 2008
  • This paper studies on the necessity of mathematics/statistics in software and hardware fields. First, this research analyzes the contents of mathematics/statistics among subjects in software and hardware fields. Secondly, this research explores the relationship and connectivity between mathematics/statistics and major tracks of software and hardware fields. This connectivity between mathematics/statistics and majors in software and hardware fields would certainly contribute to creating pragmatic and professional knowledge.

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Synthesizable Interface Verification for Hardware/Software Co-verification (하드웨어/소프트웨어 동시검증을 위한 합성 가능한 인터페이스 검증 기법)

  • Lee, Jae-Ho;Han, Tai-Sook;Yun, Jeong-Han
    • Journal of KIISE:Software and Applications
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    • v.37 no.4
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    • pp.323-339
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    • 2010
  • The complexity of embedded systems and the effort to develop them has been rising in proportion with their importance. Also, the heterogeneity of the hardware and software parts in embedded systems makes it more challenging to develop. Errors caused by hardware/software interfaces, especially, account for up to 13 percent of failures with an increasing trend. Therefore, verifying the interface between hardware and software in embedded system is one of the most important research areas. However, current approaches such as co-simulation method and model checking have explicit limitations. In this paper, we propose the synthesizable interface co-verification framework for hardware/software co-design. Firstly, we introduce the separate interface specifications for the heterogeneous components to describe hardware design and software design. Our specifications are expressive enough to describe both. We also provide the transformation rules from the software specification to the hardware specification so that the whole system can be described from the software view. Secondly, we address the solution of verifying the interface of the software and hardware design by adopting and extending existing verification-techniques and extending them. In hardware interface verification, we exploit the model checking technique and provide more efficient verification by closing the hardware design from the assumption of the software behavior which is ensured by software verification step. Lastly, we generate the interface codes such as device APIs, device driver, and device controller from the specification so that verified hardware and software codes can be synthesized without extra efforts.

Experimental approach to evaluate software reliability in hardware-software integrated environment

  • Seo, Jeongil;Kang, Hyun Gook;Lee, Eun-Chan;Lee, Seung Jun
    • Nuclear Engineering and Technology
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    • v.52 no.7
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    • pp.1462-1470
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    • 2020
  • Reliability in safety-critical systems and equipment is of vital importance, so the probabilistic safety assessment (PSA) has been widely used for many years in the nuclear industry to address reliability in a quantitative manner. As many nuclear power plants (NPPs) become digitalized, evaluating the reliability of safety-critical software has become an emerging issue. Due to a lack of available methods, in many conventional PSA models only hardware reliability is addressed with the assumption that software reliability is perfect or very high compared to hardware reliability. This study focused on developing a new method of safety-critical software reliability quantification, derived from hardware-software integrated environment testing. Since the complexity of hardware and software interaction makes the possible number of test cases for exhaustive testing well beyond a practically achievable range, an importance-oriented testing method that assures the most efficient test coverage was developed. Application to the test of an actual NPP reactor protection system demonstrated the applicability of the developed method and provided insight into complex software-based system reliability.

Hardware Burn-in and Software Testing (하드웨어 번인과 소프트웨어 시험)

  • 유영관;이종무
    • Proceedings of the Safety Management and Science Conference
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    • 2001.05a
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    • pp.77-81
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    • 2001
  • Burn-in is a test procedure to find and eliminate the inherent initial failure of a product during or at the final stage of production process. Software testing is the validation and verification process which is used to cut off the faults from a software. The two have the common function and objective of "debugging". This article summarizes some significant models on the optimal hardware and software burn-in time, and provides the relevant paper lists. The need for the development of the unified burn-in policy of a hardware-software system is addressed.addressed.

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Hardware and Software Co-Design Platform for Energy-Efficient FPGA Accelerator Design (에너지 효율적인 FPGA 가속기 설계를 위한 하드웨어 및 소프트웨어 공동 설계 플랫폼)

  • Lee, Dongkyu;Park, Daejin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.1
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    • pp.20-26
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    • 2021
  • Recent systems contain hardware and software components together for faster execution speed and less power consumption. In conventional hardware and software co-design, the ratio of software and hardware was divided by the designer's empirical knowledge. To find optimal results, designers iteratively reconfigure accelerators and applications and simulate it. Simulating iteratively while making design change is time-consuming. In this paper, we propose a hardware and software co-design platform for energy-efficient FPGA accelerator design. The proposed platform makes it easy for designers to find an appropriate hardware ratio by automatically generating application program code and hardware code by parameterizing the components of the accelerator. The co-design platform based on the Vitis unified software platform runs on a server with Xilinx Alveo U200 FPGA card. As a result of optimizing the multiplication accelerator for two matrices with 1000 rows, execution time was reduced by 90.7% and power consumption was reduced by 56.3%.

A design of PCI-based reconfigurable verification environment for IP design (IP 검증을 위한 PCI 기반 리프로그램머블 설계 기능 에뮬레이션 환경 구현)

  • 최광재;조용권;이문기
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.65-68
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    • 2002
  • The verification of software part and HW/SW interface suffer from the absence of the hardware platform at the end of partitioning and coding phase in design cycle. In this paper we present the design of easy verification for hardware design. Hardware and software engineer can verify their software program and hardware design for a chip that is emulated in proposed verification environment. Besides, designer can easily design the DEMO system.

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