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Synthesizable Interface Verification for Hardware/Software Co-verification  

Lee, Jae-Ho (삼성전자 DMC연구소 SE Lab)
Han, Tai-Sook (KAIST 전산학과)
Yun, Jeong-Han (KAIST 전산학과)
Publication Information
Journal of KIISE:Software and Applications / v.37, no.4, 2010 , pp. 323-339 More about this Journal
Abstract
The complexity of embedded systems and the effort to develop them has been rising in proportion with their importance. Also, the heterogeneity of the hardware and software parts in embedded systems makes it more challenging to develop. Errors caused by hardware/software interfaces, especially, account for up to 13 percent of failures with an increasing trend. Therefore, verifying the interface between hardware and software in embedded system is one of the most important research areas. However, current approaches such as co-simulation method and model checking have explicit limitations. In this paper, we propose the synthesizable interface co-verification framework for hardware/software co-design. Firstly, we introduce the separate interface specifications for the heterogeneous components to describe hardware design and software design. Our specifications are expressive enough to describe both. We also provide the transformation rules from the software specification to the hardware specification so that the whole system can be described from the software view. Secondly, we address the solution of verifying the interface of the software and hardware design by adopting and extending existing verification-techniques and extending them. In hardware interface verification, we exploit the model checking technique and provide more efficient verification by closing the hardware design from the assumption of the software behavior which is ensured by software verification step. Lastly, we generate the interface codes such as device APIs, device driver, and device controller from the specification so that verified hardware and software codes can be synthesized without extra efforts.
Keywords
Hardware/Software Co-verification; Interface verification; Interface generation;
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