• 디지털산업정보학회논문지
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• 제17권2호
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• pp.13-20
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• 2021

Placement is a very important step in the VLSI physical design process. It is the problem of placing circuit modules to optimize the circuit performance and reliability of the circuit. It is used at the layout level to find strongly connected components that can be placed together in order to minimize the layout area and propagation delay. The most popular algorithms for circuit placement include the cluster growth, simulated annealing, integer linear programming and genetic algorithm. In this paper we propose a adapted genetic algorithm searching solution space for the placement problem, and then compare it with simulated annealing and genetic algorithm by analyzing the results of each implementation. As a result, it was found that the adaptive genetic algorithm approaches the optimal solution more effectively than the simulated annealing and genetic algorithm.

• 한국콘텐츠학회논문지
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• 제21권7호
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• pp.164-170
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• 2021

VLSI 설계에서의 분할(partitioning)은 기능의 최적화를 위하여 설계하고자 하는 회로의 그룹화(grouping)하는 단계로서 레이아웃(layout)에서 면적과 전파지연의 최소화를 위해 함께 배치할 소자를 결정하는 문제이다. 이러한 분할 문제에서 해를 얻기 위해 사용되는 알고리즘은 Kernighan-Lin 알고리즘, Fiduccia Mattheyses heuristic, 시뮬레이티드 어닐링, 유전자 알고리즘 등의 방식이 이용된다. 본 논문에서는 회로 분할 문제에 대하여 유전자 알고리즘과 확률 진화 알고리즘을 결합한 어댑티드 유전자 알고리즘을 이용한 해 공간 탐색(solution space search) 방식을 제안하였으며, 제안한 방식을 유전자 알고리즘 및 시뮬레이티드 어닐링 방식과 비교, 분석하였고, 어댑티드 유전자 알고리즘이 시뮬레이티드 어닐링 및 유전자 알고리즘보다 더 효과적으로 최적해에 근접하는 것을 알 수 있었다.

• 전기학회논문지
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• 제62권2호
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• pp.177-183
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• 2013

We describe a new method for selecting design variables for shape optimization of high-voltage gas circuit breaker using a Kriging meta-model and a genetic algorithm. Firstly we sample balance design variables using the Latin Hypercube Sampling. Secondly, we build meta-model using the Kriging. Thirdly, we search the optimal design variables using a genetic algorithm. To obtain the more exact design variable, we adopt the boundary shifting method. With the proposed optimization frame, we can get the improved interruption design and reduce the design time by 80%. We applied the proposed method to the optimization of multivariate optimization problems as well as shape optimization of a high - voltage gas circuit breaker.

• Journal of Advanced Marine Engineering and Technology
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• 제22권5호
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• pp.687-692
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• 1998

Test pattern generation is one of most difficult problems encountered in automating the design of logic circuits. The goal is to obtain the highest fault coverage with the minimum number of test patterns for a given circuit and fault set. although there have been many deterministic algorithms and heuristics the problem is still highly complex and time-consuming. Therefore new approach-es are needed to augment the existing techniques. This paper considers the problem of test pattern improvement for combinational circuits as a restricted subproblem of the test pattern generation. The problem is to maximize the fault coverage with a fixed number of test patterns for a given cir-cuit and fault set. We propose a new approach by use of a genetic algorithm. In this approach the genetic algorithm evolves test patterns to improve their fault coverage. A fault simulation is used to compute the fault coverage of the test patterns Experimental results show that the genetic algorithm based approach can achieve higher fault coverages than traditional techniques for most combinational circuits. Another advantage of the approach is that the genetic algorithm needs no detailed knowledge of faulty circuits under test.

• Journal of Multimedia Information System
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• 제7권2호
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• pp.165-174
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• 2020

This document outlines a new color image encryption technology development. After splitting the original image into 240-bit blocks and modifying the first block by an initialization vector, an improved Feistel circuit is applied, sponsored by a genetic crossover operator and then strong chaining between the encrypted block and the next clear block is attached to set up the confusion-diffusion and heighten the avalanche effect, which protects the system from any known attack. Simulations carried out on a large database of color images of different sizes and formats prove the robustness of such a system.

• 조명전기설비학회논문지
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• 제20권6호
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• pp.81-86
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• 2006

회로 전송선 배선 시 신호선은 직선의 형태와 방향을 바꾸기 위한 구부러지는 형태를 가진다. 차동 신호선의 정확한 등가회로는 이러한 전송선 구조의 시 공간 영역에서의 신호적 특성과 인접 신호선들 간의 영향을 평가할 수 있게 해준다. 이를 위해 기존의 몇 몇 CAD Tool들이 등가 회로 모델과 그 파라미터 값들을 추출 해주기도 하지만, 이는 큰 연산량과 시간을 요구한다. 본 논문에서는 구부러진 차동 신호선의 등가회로를 모델링하기 위해 기본적 모델인 RLC-모델의 파라미터 값을 유전 알고리듬을 이용하여 추출하는 방법을 제시한다. 본 방법에 의해 더욱 빠르게 물리적 구조를 갖는 차동 신호선의 등가회로를 모델링 할 수 있다.

• 융합신호처리학회논문지
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• 제2권4호
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• pp.97-102
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• 2001

CAD(Computer-Aided Design)에서의 분할(partitioning)은 기능의 최적화를 위해 대상의 그룹화(grouping)로 레이아웃(layout)에 면적과 전파지연 최소화를 위해 함께 위치할 소자를 결정하는 문제 또는 스케쥴링이나 유닛 선택을 위한 HLS(high level synthesis)에서의 변수나 연산에 대한 집단화 (clustering) 문제들을 포함하여 분할 문제에서 해를 얻기 위해 Kernighan-Lin 알고리즘 Fiduccia Mattheyses heuristic, 시뮬레이티드 어닐링(simulated annealing)등의 방식이 이용된다. 본 논문에서는 회로 분할 문제에 대하여 유전 알고리즘(GA; genetic algorithm)을 이용한 해 공간 탐색(soultion space search)방식을 제안하였으며, 제안한 방식을 시뮬레이티드 어닐링 방식과 비교, 분석하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 G
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• pp.2944-2946
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• 1999

In this paper, digital circuit evolution is proposed as an intrinsic evolvable system. Evolutionary hardware is a reconfigurable one which adapt itself to the environment and evolve its structure to realize desired performance. By using special FPGA and genetic algorithm, we have made a prototype of intrinsic hardware evolution system. As an example for digital circuit evolution, full adder realization is performed. As the result of this, a very complex structure of digital circuit performing full adder was created. Analysis made on the hardware revealed that some undetermined circuits were developed.

• Journal of Electrical Engineering and Technology
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• 제4권3호
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• pp.360-364
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• 2009

This paper suggests the techniques in determining the values of the steady-state equivalent circuit parameters of a three-phase induction machine using genetic algorithm. The parameter estimation procedure is based on the steady-state phase current versus slip and input power versus slip characteristics. The propose estimation algorithm is of non-linear kind based on selection in genetic algorithm. The machine parameters are obtained as the solution of a minimization of objective function by genetic algorithm. Simulation shows good performance of the propose procedures.

• ETRI Journal
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• 제22권1호
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• pp.38-46
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• 2000

The extraction of model parameters for embedded passive components is crucial for designing and characterizing the performance of multichip module (MCM) substrates. In this paper, a method for optimizing the extraction of these parameters using genetic algorithms is presented. The results of this method are compared with optimization using the Levenberg-Marquardt (LM) algorithm used in the HSPICE circuit modeling tool. A set of integrated resistor structures are fabricated, and their scattering parameters are measured for a range of frequencies from 45 MHz to 5 GHz. Optimal equivalent circuit models for these structures are derived from the s-parameter measurements using each algorithm. Predicted s-parameters for the optimized equivalent circuit are then obtained from HSPICE. The difference between the measured and predicted s-parameters in the frequency range of interest is used as a measure of the accuracy of the two optimization algorithms. It is determined that the LM method is extremely dependent upon the initial starting point of the parameter search and is thus prone to become trapped in local minima. This drawback is alleviated and the accuracy of the parameter values obtained is improved using genetic algorithms.