• Title/Summary/Keyword: genetic algorithm processor

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A Load Sharing Scheme to Decrease Network Traffic Using Genetic Algorithm in Heterogeneous Environment (이질형 환경에서 네트워크 트래픽 감소를 위한 유전 알고리즘을 이용한 부하 균형 기법)

  • Cho Kwang-Moon;Lee Seong-Hoon
    • The Journal of the Korea Contents Association
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    • v.5 no.3
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    • pp.183-191
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    • 2005
  • In a sender-initiated load sharing algorithms, sender(overloaded processor) continues to send unnecessary request messages for load transfer until receiver(underloaded processor) is found while the system load is heavy. Therefore, it yields many problems such as low CPU utilization and system throughput because of inefficient inter-processor communications until the sender receives an accept message from the receiver in this environment. This paper presents an approach based on genetic algorithm(GA) for dynamic load sharing in heterogeneous distributed systems. In this scheme the processors to which the requests are sent off is determined by the proposed GA to decrease unnecessary request messages.

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A Genetic Approach for Intelligent Load Redistribution Method in Heterogeneous Distributed System (이질형시스템에서 지능적인 부하재분배를 위한 유전적 접근방법)

  • Lee Seong-Honn
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.6 no.6
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    • pp.506-512
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    • 2005
  • Load redistribution algorithm is a critical factor in computer system. In a receiver-initiated Toad redistribution algorithm, receiver(underloaded processor) continues to send unnecessary request messages for load transfer until a sender(overloaded processor) is found while the system load is light. Therefore, it yields many problems such as low cpu utilization and system throughput because of inefficient inter-processor communications until the receiver receives an accept message from the sender in this environment. This paper presents an approach based on genetic algorithm(GA) for dynamic load redistribution including self-adjustable in heterogeneous distributed systems. In this scheme the processors to which the requests are sent off are determined by the proposed GA to decrease unnecessary request messages.

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A Genetic Approach for Dynamic Load Redistribution in Heterogeneous Distributed Systems (이질형 분산시스템에서의 동적 부하재분배를 위한 유전적 접근법)

  • Lee, Seong-Hoon;Han, Kun-Hee
    • Journal of the Korea Society of Computer and Information
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    • v.11 no.1 s.39
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    • pp.1-10
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    • 2006
  • Load redistribution algorithm is a critical factor in computer system. In a receiver-initiated load redistribution algorithm, receiver(underloaded processor) continues to send unnecessary request messages for load transfer until a sender(overloaded processor) is found while the system load is light. Therefore, it yields many problems such as low CPU utilization and system throughput because of inefficient inter-processor communications until the receiver receives an accept message from the sender in this environment. This paper presents an approach based on genetic. algorithm(GA) for dynamic load redistribution in heterogeneous distributed systems. In this scheme the processors to which the requests are sent off are determined by the proposed GA to decrease unnecessary request messages.

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A Study on Embodiment of Evolving Cellular Automata Neural Systems using Evolvable Hardware

  • Sim, Kwee-Bo;Ban, Chang-Bong
    • Journal of the Korean Institute of Intelligent Systems
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    • v.11 no.8
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    • pp.746-753
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    • 2001
  • In this paper, we review the basic concept of Evolvable Hardware first. And we examine genetic algorithm processor and hardware reconfiguration method and implementation. By considering complexity and performance of hardware at the same time, we design genetic algorithm processor using modularization and parallel processing method. And we design frame that has connection structure and logic block on FPGA, and embody reconfigurable hardware that do so that this frame may be reconstructed by RAM. Also we implemented ECANS that information processing system such as living creatures'brain using this hardware reconfiguration method. And we apply ECANS which is implemented using the concept of Evolvable Hardware to time-series prediction problem in order to verify the effectiveness.

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Implementation of Genetic Algorithm Processor based on Hardware Optimization for Evolvable Hardware (진화형 하드웨어를 위한 하드웨어 최적화된 유전자 알고리즘 프로세서의 구현)

  • Kim, Jin-Jeong;Jeong, Deok-Jin
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.49 no.3
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    • pp.133-144
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    • 2000
  • Genetic Algorithm(GA) has been known as a method of solving large-scaled optimization problems with complex constraints in various applications. Since a major drawback of the GA is that it needs a long computation time, the hardware implementations of Genetic Algorithm Processors(GAP) are focused on in recent studies. In this paper, a hardware-oriented GA was proposed in order to save the hardware resources and to reduce the execution time of GAP. Based on steady-state model among continuos generation model, the proposed GA used modified tournament selection, as well as special survival condition, with replaced whenever the offspring's fitness is better than worse-fit parent's. The proposed algorithm shows more than 30% in convergence speed over the conventional algorithm in simulation. Finally, by employing the efficient pipeline parallelization and handshaking protocol in proposed GAP, above 30% of the computation speed-up can be achieved over survival-based GA which runs one million crossovers per second (1㎒), when device speed and size of application are taken into account on prototype. It would be used for high speed processing such of central processor of evolvable hardware, robot control and many optimization problems.

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A Dynamic Load Redistribution Method including Self-adjustable in Heterogeneous Distributed System (이질형 분산시스템에서의 자기조절능력을 포함하는 동적 부하재분배 방법)

  • Shim, Dong-Hee;Cho, Dong-Young
    • The Journal of Korean Association of Computer Education
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    • v.9 no.1
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    • pp.107-118
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    • 2006
  • Load redistribution algorithm is a critical factor in computer system. In a receiver-initiated load redistribution algorithm, receiver(underloaded processor) continues to send unnecessary request messages for load transfer until a sender(overloaded processor) is found while the system load is light. Therefore, it yields many problems such as low cpu utilization and system throughput because of inefficient inter-processor communications until the receiver receives an accept message from the sender in this environment. This paper presents an approach based on genetic algorithm(GA) for dynamic load redistribution including self-adjustable in heterogeneous distributed systems. In this scheme the processors to which the requests are sent off are determined by the proposed GA to decrease unnecessary request messages.

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Design of Evolvable Hardware based on Genetic Algorithm Processor(GAP)

  • Sim Kwee-Bo;Harashiam Fumio
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • v.5 no.3
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    • pp.206-215
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    • 2005
  • In this paper, we propose a new design method of Genetic Algorithm Processor(GAP) and Evolvable Hardware(EHW). All sorts of creature evolve its structure or shape in order to adapt itself to environments. Evolutionary Computation based on the process of natural selection not only searches the quasi-optimal solution through the evolution process, but also changes the structure to get best results. On the other hand, Genetic Algorithm(GA) is good fur finding solutions of complex optimization problems. However, it has a major drawback, which is its slow execution speed when is implemented in software of a conventional computer. Parallel processing has been one approach to overcome the speed problem of GA. In a point of view of GA, long bit string length caused the system of GA to spend much time that clear up the problem. Evolvable Hardware refers to the automation of electronic circuit design through artificial evolution, and is currently increased with the interested topic in a research domain and an engineering methodology. The studies of EHW generally use the XC6200 of Xilinx. The structure of XC6200 can configure with gate unit. Each unit has connected up, down, right and left cell. But the products can't use because had sterilized. So this paper uses Vertex-E (XCV2000E). The cell of FPGA is made up of Configuration Logic Block (CLB) and can't reconfigure with gate unit. This paper uses Vertex-E is composed of the component as cell of XC6200 cell in VertexE

A Scheduling Method on Parallel Computation Models with Limited Number of Processors Using Genetic Algorithms (프로세서의 수가 한정되어있는 병렬계산모델에서 유전알고리즘을 이용한 스케쥴링해법)

  • 성기석;박지혁
    • Journal of the Korean Operations Research and Management Science Society
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    • v.23 no.2
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    • pp.15-27
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    • 1998
  • In the parallel processing systems, a compiler partitions a loaded program into tasks, allocates the tasks on multiple processors and schedules the tasks on each allocated processor. In this paper we suggest a Genetic Algorithm(GA) based scheduling method to find an optimal allocation and sequence of tasks on each Processor. The suggested method uses a chromosome which consists of task sequence and binary string that represent the number and order of tasks on each processor respectively. Two correction algorithms are used to maintain precedency constraints of the tasks in the chromosome. This scheduling method determines the optimal number of processors within limited numbers, and then finds the optimal schedule for each processor. A result from computational experiment of the suggested method is given.

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Genetic Scheduling Algorithm for FFT Dta Flows in Parallel Computers (병렬 컴퓨터 시스템에서의 FFT 데이터 흐름도에 관한 유전 스케줄링 알고리즘)

  • 박월선;김금호;서루비;윤성대
    • Proceedings of the IEEK Conference
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    • 2000.06c
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    • pp.161-164
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    • 2000
  • We propose the genetic algorithm to apply three kinds of FFT data flows to be considered the overhead for the data exchange between processors that have the multi-scheduling problem on parallel computer In the design of genetic algorithm, we propose the chromosome representation which can simply encode and decode a solution without any heuristic information, the evaluation function to be considered an efficiency of processor, and the genetic operator to inherit a superior gene from their parents. And we saw that the simulation result can verify better performance than the existing algorithm(BEA : binary exchange algorithm)in the face of execution time.

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The Design of Bridge Diagnosis System Using Genetic Algorithm & Embedded LINUX (임베디드 리눅스와 유전자 알고리즘을 이용한 교량 진단 시스템 설계)

  • Park Se-Hyun;Song Keun-Young
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.2
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    • pp.355-360
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    • 2005
  • This paper proposes bridge diagnosis system using Embedded LINUX and Genetic algorithm. The proposed system consists of MPC860 processor, FPCA, Bridge sensors and Genetic algorithm for bridge diagnosis. And the proposed system can operate with World Wide Web in GUI environment by lava, therefore, system is useful in diagnosing bridge at all times. Using genetic algorithm, this system can measure various bridge sensors with best gain and offset, therefore, range of measurement can be enlarged. Proposed system is certified by system-based test. .