• Title/Summary/Keyword: gate voltage

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Design of A 3V CMOS Lowpass Filter Using the Improved Continuous-Time Fully-Differential Current-Mode Integrator (개선된 연속시간 Fully-Differential 전류모드 적분기를 이용한 3V CMOS 저역필터 설계)

  • 최규훈;방준호;조성익
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.4
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    • pp.685-695
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    • 1997
  • In this paper, a new CMOS continuous-time fully-differential current-mode integrator is proposed as a basic building block of the low-voltage high frequency current-mode active filter. The proposed integrator is composed of the CMOS complementary circuit which can extend transconductance of an integrator. Therefore, the unity gain frequency which is determined by a small-signal transconductance and a MOSFET gate capacitance can be expanded by the complementary transconductance of the proposed integrator. And also the magnitude of pole and zero are increased. The unity gain frequency of the proposed integrator is increased about two times larger than that of the conventional continuous-time fully-differential integrator with NMOS-gm. These results are verified by the small signal analysis and the SPICE simulation. As an application circuit of the proposed fully-differential current-mode integrator, the three-pole Chebyshev lowpass filter is designed using 0.8.$\mu$m CMOS processing parameters. SPICE simulation predicts a 3-dB bandwidth of 148MHz and power dissipation of 4.3mW/pole for the three-pole filter with 3-V power supply.

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Structural and C-V characteristics of SrTiO$_3$ /PbTiO$_3$ thin film deposited on Si (Si 기판위에 증착한 SrTiO$_3$ /PbTiG$_3$ 고용체 박막의 구조적 특성 및 C-V 특성)

  • 이현숙;이광배;김윤정;박장우
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.07a
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    • pp.71-74
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    • 2000
  • Pt/Pb$TiO_3$/$SrTiO_3$/p-Si films were prepared by metallo-organic solution deposition(M0SD) method and investigated its structure and ferroelectric properties. Crystallinity of specimen as a funtions of post annealing temperature and the thickness of $SrTiO_3$(STO) buffer layer was studied using XRD and AFM. Based on C-V and P-E curve, $PbTiO_3$(PTO) capacitors showed good ferroelectric hysteresis arising from the polarization switching properties. When the thickness of ST0 buffer layer between PTO and Si substrate was 260 nrn and the post annealing temperature was $650^{\circ}C$, it was showed that production of the pyrochlore phase due to interdiffusion of Si into FTO was prevented. The dielectric constant of FTO thin films calculated from a maximum Cma in the accumulation region was 180 and the dielectric loss was 0.30 at 100 kHz frequency. The memory window in the C-V curve is 1.6V at a gate voltage of 5V.

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Tunneling Properties in High-k Insulators with Engineered Tunnel Barrier for Nonvolatile Memory (차세대 비휘발성 메모리에 사용되는 High-k 절연막의 터널링 특성)

  • Oh, Se-Man;Jung, Myung-Ho;Park, Gun-Ho;Kim, Kwan-Su;Chung, Hong-Bay;Lee, Young-Hie;Cho, Won-Ju
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.22 no.6
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    • pp.466-468
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    • 2009
  • The metal-insulator-silicon (MIS) capacitors with $SiO_2$ and high-k dielectrics ($HfO_2$, $Al_2O_3$) were fabricated, and the current-voltage characteristics were investigated. Especially, an effective barrier height between metal gate and dielectric was extracted by using Fowler-Nordheim (FN) plot and Direct Tunneling (DT) plot of quantum mechanical(QM) modeling. The calculated barrier heights of thermal $SiO_2$, ALD $SiO_2$, $HfO_2$ and $Al_2O_3$ are 3.35 eV, 0.6 eV, 1.75 eV, and 2.65 eV, respectively. Therefore, the performance of non-volatile memory devices can be improved by using engineered tunnel barrier which is considered effective barrier height of high-k materials.

Characteristics of IGZO Thin Film Transistor Deposited by DC Magnetron Sputtering (DC 마그네트론 스퍼터링 방법을 이용하여 증착한 IGZO 박막트랜지스터의 특성)

  • Kim, Sung-Yeon;Myoung, Jae-Min
    • Korean Journal of Materials Research
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    • v.19 no.1
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    • pp.24-27
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    • 2009
  • Indium Gallium Zinc Oxide (IGZO) thin films were deposited onto 300 nm-thick oxidized Si substrates and glass substrates by direct current (DC) magnetron sputtering of IGZO targets at room temperature. FESEM and XRD analyses indicate that non-annealed and annealed IGZO thin films exhibit an amorphous structure. To investigate the effect of an annealing treatment, the films were thermally treated at $300^{\circ}C$ for 1hr in air. The IGZO TFTs structure was a bottom-gate type in which electrodes were deposited by the DC magnetron sputtering of Ti and Au targets at room temperature. The non-annealed and annealed IGZO TFTs exhibit an $I_{on}/I_{off}$ ratio of more than $10^5$. The saturation mobility and threshold voltage of nonannealed IGZO TFTs was $4.92{\times}10^{-1}cm^2/V{\cdot}s$ and 1.46V, respectively, whereas these values for the annealed TFTs were $1.49{\times}10^{-1}cm^2/V{\cdot}$ and 15.43V, respectively. It is believed that an increase in the surface roughness after an annealing treatment degrades the quality of the device. The transmittances of the IGZO thin films were approximately 80%. These results demonstrate that IGZO thin films are suitable for use as transparent thin film transistors (TTFTs).

Low-loss Electrically Controllable Vertical Directional Couplers

  • Tran, Thang Q.;Kim, Sangin
    • Current Optics and Photonics
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    • v.1 no.1
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    • pp.65-72
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    • 2017
  • We propose a nearly lossless, compact, electrically modulated vertical directional coupler, which is based on the controllable evanescent coupling in a previously proposed graphene-assisted total internal reflection (GA-FTIR) scheme. In the proposed device, two single-mode waveguides are separate by graphene-$SiO_2$-graphene layers. By changing the chemical potential of the graphene layers with a gate voltage, the coupling strength between the waveguides, and hence the coupling length of the directional coupler, is controlled. Therefore, for a properly chosen, fixed device length, when an input wave is launched into one of the waveguides, the ratio of their output powers can be controlled electrically. The operation of the proposed device is analyzed, with the dispersion relations calculated using a model of a one-dimensional slab waveguide. The supermodes in the coupled waveguide are calculated using the finite-element method to estimate the coupling length, realistic devices are designed, and their performance was confirmed using the finite-difference time-domain method. The designed $3{\mu}m$ by $1{\mu}m$ device achieves an insertion loss of less than 0.11 dB, and a 24-dB extinction ratio between bar and cross states. The proposed low-loss device could enable integrated modulation of a strong optical signal, without thermal buildup.

Thermal treatments effects on the properties of zinc tin oxide transparent thin film transistors (Zinc tin oxide 투명박막트랜지스터의 특성에 미치는 열처리 효과)

  • Ma, Tae Young
    • Journal of IKEEE
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    • v.23 no.2
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    • pp.375-379
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    • 2019
  • $ZnO-SnO_2(ZTO)$ was deposited by RF magnetron sputtering using a ceramic target whose Zn atomic ratio to Sn is 2:1 as a target, and the crystal structure variation with thermal treats was investigated. Transparent thin film transistors (TTFT) were fabricated using the ZTO films as active layers. About 100 nm-thick $Si_3N_4$ film grown on 100 nm-thick $SiO_2$ film was adopted as gate dielectrics. The mobility, threshold voltage, $I_{on}/I_{off}$, and interface trap density were obtained from the transfer characteristics of ZTO TTFTs. The effects of substrate temperature, and post-annealing on the property variation of ZTO TTFT were analyzed.

Technical Trends in Next-Generation GaN RF Power Devices and Integrated Circuits (차세대 GaN RF 전력증폭 소자 및 집적회로 기술 동향)

  • Lee, S.H.;Lim, J.W.;Kang, D.M.;Baek, Y.S.
    • Electronics and Telecommunications Trends
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    • v.34 no.5
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    • pp.71-80
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    • 2019
  • Gallium nitride (GaN) can be used in high-voltage, high-power-density/-power, and high-speed devices owing to its characteristics of wide bandgap, high carrier concentration, and high electron mobility/saturation velocity. In this study, we investigate the technology trends for X-/Ku-band GaN RF power devices and MMIC power amplifiers, focusing on gate-length scaling, channel structure, and power density for GaN RF power devices and output power level and output power density for GaN MMIC power amplifiers. Additionally, we review the technology trends in gallium arsenide (GaAs) RF power devices and MMIC power amplifiers and analyze the technology trends in RF power devices and MMIC power amplifiers based on both GaAs and GaN. Furthermore, we discuss the current direction of national research by examining the national and international technology trends with respect to X-/Ku-band power devices and MMIC power amplifiers.

Fabrication of high-frequency therapy device for deep part and temperature distribution characteristic according to electrode condition of RET (심부투열용 고주파 치료기의 제작과 RET 전극조건에 따른 온도 분포 특성)

  • Jung, Jae-Won;Kim, Beong-Ju;Kim, Ki-Seon
    • Journal of Advanced Engineering and Technology
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    • v.11 no.4
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    • pp.267-271
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    • 2018
  • A high-frequency therapy device with improved output by modifying a high-frequency stimulator was fabricated. The details of the design include generating part design, high-frequency transformer design, large output FET installation, DC voltage input part design and gate input driver design. Based on the real test using the pork meat, the temperature distributions according to the current electric transfer method, penetration depth, electrode diameter size were measured. In the CET method, the penetration depth was 0.5 cm and in the RET method, the penetration depth was 20 cm or more. In addition, it was confirmed that the temperature rise according to the penetration depth in the RET system was substantially constant, and the temperature rise was remarkable as the electrode diameter was small. As a result, it has been confirmed that the high frequency therapy device is highly affected by various conditions of the electrode.

Parallel Control Method of a Modular DC/DC Converter for Electric Vehicle Chargers (전기차 충전기용 모듈형 DC/DC 컨버터의 병렬 제어 기법)

  • Choi, Hye-Won;Lee, Kyo-Beum
    • Journal of IKEEE
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    • v.25 no.1
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    • pp.101-108
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    • 2021
  • This paper proposes a parallel control method of a modular DC/DC converter for electric vehicle (EV) chargers. The EV chargers have been increasing the power capacity using modular converters. There are output current imbalances between the modules, which are caused by the difference of the impedance, delay of the gate driver, and error of the sensors. The conventional strategies for the equal distribution of the output current cause the voltage drop or the high volume and cost of the converters. Therefore, the proposed parallel control strategy effectively balances the output current of modules using a current compensation method. The proposed strategy is verified by simulations. Additional experimental results will be added under various conditions.

Use of 1.7 kV and 3.3 kV SiC Diodes in Si-IGBT/ SiC Hybrid Technology

  • Sharma, Y.K.;Coulbeck, L.;Mumby-Croft, P.;Wang, Y.;Deviny, I.
    • Journal of the Korean Physical Society
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    • v.73 no.9
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    • pp.1356-1361
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    • 2018
  • Replacing conventional Si diodes with SiC diodes in Si insulated gate bipolar transistor (IGBT) modules is advantageous as it can reduce power losses significantly. Also, the fast switching nature of the SiC diode will allow Si IGBTs to operate at their full high-switching-speed potential, which at present conventional Si diodes cannot do. In this work, the electrical test results for Si-IGBT/4HSiC-Schottky hybrid substrates (hybrid SiC substrates) are presented. These substrates are built for two voltage ratings, 1.7 kV and 3.3 kV. Comparisons of the 1.7 kV and the 3.3 kV Si-IGBT/Si-diode substrates (Si substrates) at room temperature ($20^{\circ}C$, RT) and high temperature ($H125^{\circ}C$, HT) have shown that the switching losses in hybrid SiC substrates are miniscule as compared to those in Si substrates but necessary steps are required to mitigate the ringing observed in the current waveforms. Also, the effect of design variations on the electrical performance of 1.7 kV, 50 A diodes is reported here. These variations are made in the active and termination regions of the device.