• Title/Summary/Keyword: gate insulator

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Performance of capacitorless 1T-DRAM cell on silicon-germanium-on-insulator (SGOI) substrate (SGOI 기판을 이용한 1T-DRAM에 관한 연구)

  • Jung, Seung-Min;Oh, Jun-Seok;Kim, Min-Soo;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.346-346
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    • 2010
  • A capacitorless one transistor dynamic random access memory (1T-DRAM) on silicon-germanium-on-insulator substrate was investigated. SGOI technology can make high effective mobility because of lattice mismatch between the Si channel and the SiGe buffer layer. To evaluate memory characteristics of 1T-DRAM, the floating body effect is generated by impact ionization (II) and gate induced drain leakage (GIDL) current. Compared with use of impact ionization current, the use of GIDL current leads to low power consumption and larger sense margin.

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Output Characteristics of Carbon-nanotube Field-effect Transistor Dependent on Nanotube Diameter and Oxide Thickness (나노튜브 직경과 산화막 두께에 따른 탄소나노튜브 전계 효과 트랜지스터의 출력 특성)

  • Park, Jong-Myeon;Hong, Shin-Nam
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.2
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    • pp.87-91
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    • 2013
  • Carbon-nanotube field-effect transistors (CNFETs) have drawn wide attention as one of the potential substitutes for metal-oxide-semiconductor field-effect transistors (MOSFETs) in the sub-10-nm era. Output characteristics of coaxially gated CNFETs were simulated using FETToy simulator to reveal the dependence of drain current on the nanotube diameter and gate oxide thickness. Nanotube diameter and gate oxide thickness employed in the simulation were 1.5, 3, and 6 nm. Simulation results show that drain current becomes large as the diameter of nanotube increases or insulator thickness decreases, and nanotube diameter affects the drain current more than the insulator thickness. An equation relating drain saturation current with nanotube diameter and insulator thickness is also proposed.

Fabrication of soluble organic thin film transistor with ammonia ($NH_3$) plasma treatment

  • Kim, Dong-Woo;Kim, Doo-Hyun;Kim, Keon-Soo;Kim, Hyoung-Jin;Choi, Hong;Lee, Dong-Hyeok;Hong, Mun-Pyo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.566-567
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    • 2009
  • We have examined the silicon nitride ($SiN_x$) as gate insulator with the ammonia ($NH_3$) plamsa treatment for the soluble derivatives of polythiophene as p-type channel materials of organic thin film transistors (OTFTs). Fabrications of the jetting-processed OTFTs with $SiN_x$ as gate insulator by $NH_3$ plasma treatment can be similar to performance of OTFTs with silicon dioxide ($SiO_2$) insulator.

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Pentacene TFT's Characteristic depending on the Density of PVP Gate Insulator (PVP 게이트 절연체의 농도에 대한 펜타센 TFT의 특성 변화)

  • Byun Hyun-Sook;Xu Yong-Xian;Jung Hyun;Hwang Sung-Beam;Song Chung-Kun
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.375-378
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    • 2004
  • In this paper, we fabricated pantacene TFTs using PVP copolymer and cross-linked PVP as gate insulator on glass and plastic (PET) substrate. Depending on the density of PVP and poly (melamine-co-formaldehyde) the performance has been changed. We obtained the best performance with the mobility of 0.12cm2/V sec and the on/off current ratio of $1.19{\times}10^6$ for the case of $10wt\%$ PVP copolymer mixed with $5wt\%$ poly(melamine-co-formaldehyde). Additionally using OTFTs with the above PVP gate insulator, we fabricated the integrated circuit including inverter which produced the gain of 5.56 on the glass substrate and gain of 9.7 on the plastic (PET) substrate. And the threshold voltage was respectively +8V and +14v$ldots$

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Hysteresis-free organic field-effect transistors with ahigh dielectric strength cross-linked polyacrylate copolymer gate insulator

  • Xu, Wentao;Lim, Sang-Hoon;Rhee, Shi-Woo
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2009.11a
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    • pp.48.1-48.1
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    • 2009
  • Performance of organic field-effect transistors (OFETs) with various temperature-cured polyacrylate(PA) copolymer as a gate insulator was studied. The PA thin film, which was cured at an optimized temperature, showed high dielectric strength (>7 MV/cm), low leakage current density ($5{\times}10^{-9}\;A/cm^2$ at 1 MV/cm) and enabled negligible hysteresis in MIS capacitor and OFET. A field-effect mobility of ${\sim}0.6\;cm^2/V\;s$, on/off current ratio (Ion/Ioff) of ${\sim}10^5$ and inverse subthreshold slope (SS) as low as 1.22 V/decwere achieved. The high dielectric strength made it possible to scale down the thickness of dielectric, and low-voltage operation of -5 V was successfully realized. The chemical changes were monitored by FT-IR. The morphology and microstructure of the pentacene layer grown on PA dielectrics were also investigated and correlated with OFET device performance.

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Effect of Adhesion Layer on Gate Insulator (게이트 절연막에 사용된 점착층에 대한 영향)

  • Lee, Dong-Hyun;Hyung, Gun-Woo;Pyo, Sang-Woo;Kim, Young-Kwan
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.4
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    • pp.357-361
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    • 2006
  • The electrical performances of organic thin-film transistors (OTFTs) have been improved for the last decade. In this paper, it was demonstrated that the electrical characteristics of the organic thin film transistors (OTFTs) were improved by using polymeric material as adhesion layer on gate insulator. We have investigated OTFTs with polyimide adhesion layer which was fabricated by vapor deposition polymerization (VDP) processing and formed by co-deposition of 2,2-bis (3,4-dicarboxyphenyl) hexafluoropropane dianhydride and 4,4'-oxydianiline. It was found that the OTFTs with adhesion layer showed better electrical characteristics than with bare layer because of good matching between semiconductor and gate insulator. Our devices of performance are field effect mobility of $0.4cm^2/Vs$, threshold voltage of -0.8 V and on-off current ratio of $10^6$. In addition, to improve the electrical characteristics of OTFT, we have reduced the thickness of adhesion layer up to a few nanometrs.

The effect of 3-mercapto-5-nitro-benzimidazole (MNB) and poly (methyl methacrylate) (PMMA) treatment sequence organic thin film transistor

  • Park, Jin-Seong;Suh, Min-Chul;Jeong, Jong-Han;Kim, Su-Young;Mo, Yeon-Gon
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1174-1177
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    • 2006
  • A bottom contact organic thin film transistor (OTFT) is fabricated with an organic double-layered gate insulator (GI) and pentacene. The PMMA and MNB layers are treated on gate insulator and source/drain (S/D, Au) before depositing pentacene to investigate device properties and pentacene growth. The sequence of surface treatment affects a device performance seriously. The ultra-thin PMMA (below 50A) was deposited on organic gate insulator and S/D metal by spin coating method, which showed no deterioration of on-state current (Ion) although bottom contact structure was exploited. We proposed that the reason of no contact resistance (Rc) increase may be due to a wettability difference in between PMMA / Au and PMMA / organic GI. As a result, the device treated by $PMMA\;{\rightarrow}\;MNB$ showed much better Ion behavior than those fabricated by $MNB\;{\rightarrow}\;PMMA$. We will report the important physical and electrical performance difference associated with surface treatment sequence.

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The Effect of Adhesion layer on Gate Insulator for OTFTs (OTFT의 게이트 절연막에 사용된 점착층에 대한 영향)

  • Lee, Dong-Hyun;Hyung, Gun-Woo;Pyo, Sang-Woo;Kim, Jung-Soo;Kim, Young-Kwan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.70-71
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    • 2005
  • The electrical performances of organic thin-film transistors (OTFTs) have been improved for the last decade. In this paper, it was demonstrated that the electrical characteristics of the organic thin film transistors (OTFTs) were improved by using polymeric material as adhesion layer on gate insulator. We have investigated OTFTs with polyimide adhesion layer which was fabricated by vapor deposition polymerization (VDP) processing and formed by co-deposition of 6FDA and ODA. It was found that the OTFTs with adhesion layer showed better electrical characteristics than with bare layer because of good matching between semiconductor and gate insulator. Our devices of performance are field effect mobility of $0.4cm^2$/Vs, threshold voltage of -0.8 V and on-of current ratio of $10^6$. In addition, to improve the electrical characteristics of OTFT, we have reduced the thickness of adhesion layer up to a few nanometrs.

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An Organic Electrophosphorescent Device Driven by All-Organic Thin-Film Transistor using Polymeric Gate Insulator

  • Pyo, S.W.;Shim, J.H.;Kim, Y.K.
    • Journal of Information Display
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    • v.4 no.2
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    • pp.1-6
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    • 2003
  • In this paper, we demonstrate that the organic electrophosphorescent device is driven by the organic thin film transistor with spin-coated photoacryl gate insulator. It was found that electrical output characteristics in our organic thin film transistors using the staggered-inverted top-contact structure showed the non-saturated slope in the saturation region and the sub-threshold nonlinearity in the triode region, where we obtained the maximum power luminance that was about 90 $cd/m^2$. Field effect mobility, threshold voltage, and on-off current ratio in 0.45 ${\mu}m$ thick gate dielectric layer were 0.17 $cm^2/Vs$, -7 V, and $10^6$ , respectively. In order to form polyimide as a gate insulator, vapor deposition polymerization process was also introduced instead of spin-coating process, where polyimide film was co-deposited by high-vacuum thermal evaporation from 4,4'-oxydiphthalic anhydride (ODPA) and 4,4'-oxydianiline (ODA) and cured at 150${\sqsubset}$for 1hr. It was also found that field effect mobility, threshold voltage, on-off current ratio, and sub-threshold slope with 0.45 ${\mu}m$ thick gate dielectric films were 0.134 $cm^2/Vs$, -7 V, and $10^6$ A/A, and 1 V/decade, respectively.

a-Si:H TFT Using Ferroelectrics as a Gate Insulator

  • Hur, Chang-Wu;Kung Sung;Jung-Soo, Youk;Sangook Moon;Kim, Jung-Tae
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2004.05a
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    • pp.53-56
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    • 2004
  • The a-Si:H TFT using ferroelectric of SrTi $O_3$as a gate insulator is fabricated on glass. Dielectric characteristics of ferroelectric are superior to $SiO_2$and S $i_3$ $N_4$. Ferroelctric increases on-current, decreases thresh old voltage of TFT and also improves breakdown characteristics. The a-SiN:H has optical band gap of 2.61 eV, refractive index of 1.8~2.0 and resistivity of 10$^{13}$ - 10$^{15}$ $\Omega$cm, respectively. Insulating characteristics of ferroelectrics are excellent because dielectric constant of ferroelectric is about 60~100 and breakdown strength is over 1MV/cm. TFT using ferroelectric has channel length of 8~20${\mu}{\textrm}{m}$ and channel width of 80~200${\mu}{\textrm}{m}$. And it shows that drain current is 3.4$mutextrm{A}$ at 20 gate voltage, $I_{on}$ / $I_{off}$ is a ratio of 10$^{5}$ - 10$^{8}$ and $V_{th}$ is 4~5 volts, respectively. In the case of TFT without ferroelectric, it indicates that the drain current is 1.5 $mutextrm{A}$ at 20 gate voltage and $V_{th}$ is 5~6 volts. With the improvement of the ferroelectric thin film properties, the performance of TFT using this ferroelectric has advanced as a gate insulator fabrication technology is realized.zed.d.

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