• 대한전자공학회논문지SD
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• 제48권3호
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• pp.7-11
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• 2011

본 논문에서는 간단하면서도 수율 높은 유기박막트랜지스터(OTFT)의 소스/드레인 전극 형성을 위한 인쇄공정을 제안하였다. 게이트 유전체인 PVP (poly 4-vinylphenol)에 불소계 화합물을 3000 ppm 첨가하여 표면에너지를 56 $mJ/m^2$에서 45 $mJ/m^2$로 줄이고, 소스/드레인 전극이 형성될 영역은 포토리소그라피로 형상화 한 후 산소 플라즈마로 선택적으로 표면처리하여 표면에너지를 87 $mJ/m^2$로 높임으로써 표면에너지 차이를 극대화 하였다. G-PEDOT:PSS 전도성 고분자를 브러쉬 인쇄공정으로 소스/드레인 전극 영역 주변에 도포하여 전극을 성형하였으며, OTFT 어레이 ($16{\times}16$)에서 약 90% 가까운 수율을 나타내었다. 불소계 화합물을 첨가한 PVP와 펜타센 반도체를 사용한 OTFT의 성능은 첨가하지 않은 소자와 비교하여 큰 차이가 없었으며, 이동도는 0.1 $cm^2/V.sec$ 로서 전기영동디스플레이(EPD) 시트를 구동하기에 충분한 성능이었다. OTFT 어레이에 EPD 시트를 부착하여 성공적인 작동을 확인하였다.

• 한국재료학회지
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• 제2권4호
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• pp.285-292
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• 1992

Si(100) 웨이퍼를 사용하여 RTP 장비에서 $O_2$와 $N_2$O 분위기에서 8nm의 oxynitride를 제조 하였다. 기존의 로(furnace) 열산화막과 비교해서 oxynitride는 I-V, TDDB 특성이 우수하였고, flat-band voltage shift도 적었으며 $BF_2이온$ 주입에 의한 붕소 투과 억제 특성도 우수하다. 유전상수는 oxynitride가 열산화막에 비해서 크다. Oxynitride는 순수한 Si$O_2$유사하게 V 〉${\varphi}_0$ 구간에서 Fowler-Nordheim 터널링 특성을 나타낸다. SIMS, AES, 그리고 XPS 분석 결과 질소 pile-up이 Si$O_2$/Si 계면에서 나타나고, 이것은 oxynitride 산화막 특성 향상과 깊은 관련이 있다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제1권4호
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• pp.216-231
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• 2001

Several methods for improving device yields and characteristics have been studied by IC manufacturers, as the options for programming components become diversified through the introduction of novel processes. Especially, the sequential repair steps on wafer level and package level are essentially required in DRAMs to improve the yield. Several repair methods for DRAMs are reviewed in this paper. They include the optical methods (laser-fuse, laser-antifuse) and the electrical methods (electrical-fuse, ONO-antifuse). Theses methods can also be categorized into the wafer-level(on wafer) and the package-level(post-package) repair methods. Although the wafer-level laser-fuse repair method is the most widely used up to now, the package-level antifuse repair method is becoming an essential auxiliary technique for its advantage in terms of cost and design efficiency. The advantages of the package-level antifuse method are discussed in this paper with the measured data of manufactured devices. With devices based on several processes, it was verified that the antifuse repair method can improve the net yield by more than 2%~3%. Finally, as an illustration of the usefulness of the package-level antifuse repair method, the repair method was applied to the replica delay circuit of DLL to get the decrease of clock skew from 55ps to 9ps.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.857-860
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• 2005

We reported 94 GHz, low conversion loss, and high isolation single balanced active-gate mixer based on 70 nm gate length InGaAs/InAlAs metamorphic high electron mobility transistors (MHEMTs). This mixer showed that the conversion loss and isolation characteristics were 2.5 ${\sim}$ 2.8 dB and under -30 dB, respectively, in the range of 93.65 ${\sim}$ 94.25 GHz. The low conversion loss of the mixer is mainly attributed to the high-performance of the MHEMTs exhibiting a maximum drain current density of 607 mA/mm, a extrinsic transconductance of 1015 mS/mm, a current gain cutoff frequency ($f_t$) of 330 GHz, and a maximum oscillation frequency ($f_{max}$) of 425 GHz. High isolation characteristics are due to hybrid ring coupler which adopted dielectric-supported air-gapped microstrip line (DAML) structure using surface micromachined technology. To our knowledge, these results are the best performance demonstrated from 94 GHz single balanced mixer utilizing GaAs-based HEMTs in terms of conversion loss as well as isolation characteristics.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.128.1-128.1
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• 2016

Nitrided-metal gates on the high-${\kappa}$ dielectric material are widely studied because of their use for sub-20nm semiconductor devices and the academic interest for the evanescent states at the Si/insulator interface. Issues in these systems with the Si substrate are the electron mobility degradation and the reliability problems caused from N defects that permeates between the Si and the $SiO_2$ buffer layer interface from the nitrided-gate during the gate deposition process. Previous studies proposed the N defect structures with the gap states at the Si band gap region. However, recent experimental data shows the possibility of the most stable structure without any N defect state between the bulk Si valence band maximum (VBM) and conduction band minimum (CBM). In this talk, we present a new type of the N defect structure and the electronic structure of the proposed structure by using the first-principles calculation. We find that the pair structure of N atoms at the $Si/SiO_2$ interface has the lowest energy among the structures considered. In the electronic structure, the N pair changes the eigenvalue of the silicon-induced gap state (SIGS) that is spatially localized at the interface and energetically located just above the bulk VBM. With increase of the number of N defects, the SIGS gradually disappears in the bulk Si gap region, as a result, the system gap is increased by the N defect. We find that the SIGS shift with the N defect mainly originates from the change of the kinetic energy part of the eigenstate by the reduction of the SIGS modulation for the incorporated N defect.

• 한국진공학회지
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• 제10권3호
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• pp.328-334
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• 2001

초박막 게이트 유전막 및 비휘발성 기억소자의 게이트 유전막으로 연구되고 있는 NO/$N_2$O 질화산화막 및 재산화질화산화막의 특성을 D-SIMS(dynamic secondary ion mass spectrometry), ToF-SIMS(time-of-flight secondary ion mass spectrometry), XPS(x-ray Photoelectron spectroscopy)으로 조사하였다. 시료는 초기산화막 공정후에 NO 및 $N_2$O 열처리를 수행하였으며, 다시 재산화공정을 통하여 질화산화막내 질소의 재분포를 형성토록 하였다. D-SIMS 분석결과 질소의 중심은 초기산화막 계면에 존재하며 열처리 공정에서 NO에 비해서 $N_2$O의 경우 질소의 분포는 넓게 나타났다. 질화산화막내 존재하는 질소의 상태를 조사하기 위하여 ToF-SIMS 및 XPS 분석을 수행한 결과 SiON, $Si_2$NO의 결합이 주도적이며 D-SIMS에서 조사된 질소의 중심은 SiON 결합에 기인한 것으로 예상된다. 재산화막/실리콘 계면근처에 존재하는 질소는 $Si_2$NO 결합형태로 나타나며 이는 ToF-SIMS로 얻은 SiN 및 $Si_2$NO 결합종의 분포와 일치하였다.

• 한국진공학회지
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• 제11권4호
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• pp.230-234
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• 2002

고온 급속 열처리를 행한 $LiNbO_3Si$/(100) 구조를 가지고 여러 가지 전극을 사용하여 금속/강유전체/반도체 커패시터를 제작하였으며, 제작한 커패시터의 비휘발성 메모리 응용 가능성을 확인하였다. MFS 커패시터의 C-V 특성 곡선에서는 LiNbO$_3$박막의 강유전성으로 인한 히스테리시스 특성이 관측되었으며, 1 MHz C-V 특성 곡선의 축적 영역에서 산출한 비유전율은 약 25 이었다. Pt 전극을 사용하여 제작한 커패시터에서는 인가 전계 500 kV/cm 범위에서 $1\times10^{-8}$ A/cm 이하의 우수한 누설전류 특성이 나타났다. midgap 부근에서의 계면 준위 밀도는 약 $10^{11}\textrm{cm}^2$.eV 이었으며, 잔류분극 값은 약 1.2 $\muC/\textrm{cm}^2$ 였다. Pt 전극과 A1 전극 모두 500 kHz 주파수의 바이폴러 펄스를 인가하면서 측정한 피로 특성에서 $10^{10}$ cycle 까지 측정된 잔류 분극 값이 초기 값과 같았다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1993년도 춘계학술대회 논문집
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• pp.39-43
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• 1993

Electricial characteristics of gate dielectrics prepared by reoxidation of thermal $SiO_2$ in nitrous oxide gas have been investigated. 10 and 19nm-thick oxides were reoxidized at temperatures of $900-1000^{\circ}C$ for 10-60 min in $N_2O$ ambient. As reoxidation proceeds, it is shown that nitrogen concentration at $Si/SiO_2$ interface increases gradually through the AES analysis. Nitrogen pile-up at $Si/SiO_2$ interface acts as a oxidant diffusion barrier that reduces the oxidation rate significantly. And it not only strengthen oxynitride structure at the interface but improve the gate dielectric qualities. Reliabilities of oxynitride films are conformed by the breakdown distributions and constant current stress technique. Therefore, the oxynitride films made by this process show a good promise for future ULSI applications.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.293-294
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• 2008

CaO stabilized cubic-$HfO_2$ is studied by using Density Functional Theory with GGA. When a Ca atom is substituted for a Hf atom, an oxygen vacancy is produced to satisfy the charge neutrality condition. When the oxygen vacancy is located at the first nearest site from the Ca atom, the total energy of $HfO_2$ is the most favorable. We calculate the energy barriers for the oxygen vacancy migration. The energy barriers between the first and the second nearest sites, the second and the third nearest sites, and the third and fourth nearest sites are 0.2, 0.5, 0.24 eV, respectively. The oxygen vacancies at the third and fourth nearest sites from the Ca atom represent the oxygen vacancies in undoped $HfO_2$. Therefore, the energy barrier for oxygen migration in $HfO_2$ gate dielectricis is 0.24eV, which can explain a leakage origin of gate dielectric.

• Journal of Information Display
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• 제10권4호
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• pp.149-157
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• 2009

Reported herein is the architecture for a nonvolatile n-type memory paper field-effect transistor. The device was built via the hybrid integration of natural cellulose fibers (pine and eucalyptus fibers embedded in resin with ionic additives), which act simultaneously as substrate and gate dielectric, using passive and active semiconductors, respectively, as well as amorphous indium zinc and gallium indium zinc oxides for the gate electrode and channel layer, respectively. This was complemented by the use of continuous patterned metal layers as source/drain electrodes.