• 제목/요약/키워드: gap fill

검색결과 383건 처리시간 0.029초

Monostatic RCS Reduction by Gap-Fill with Epoxy/MWCNT in Groove Pattern

  • Choi, Won-Ho;Jang, Hong-Kyu;Shin, Jae-Hwan;Song, Tae-Hoon;Kim, Jin-Kyu;Kim, Chun-Gon
    • Journal of electromagnetic engineering and science
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    • 제12권1호
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    • pp.101-106
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    • 2012
  • In this study, we investigated the effect of groove pattern and gap-fill with lossy materials at 15 GHz frequency of Ku-band. We used Epoxy/MWCNT composite materials as gap-fill materials. Although epoxy does not have an absorbance capability, epoxy added conductive fillers, which are multi-walled carbon nanotubes (MWCNT), can function as radar absorbing material. Specimens were fabricated with different MWCNT mass fractions (0, 0.5, 1.0, 2.0 wt%) and their permittivity in the Ku-band was measured using the waveguide technique. We investigated the effect of gap-fill on monostatic RCS by calculating RCS with and without gap-fill. For arbitrarily chosen thickness and experimentally obtained relative permittivity, we chose the relative permittivity of MWCNT at 2 wt% (${\varepsilon}_r$=8.8-j2.4), which was the lowest reflection coefficient for given thickness of 3.3 mm at V-pol. and $80^{\circ}$ incident angle. We also checked the monostatic RCS and the field intensity inside the groove channel. In the case of H-pol, gap-fill was not affected by the monostatic RCS and magnitude was similar with or without gap-fill. However, in the case of V-pol, gap-fill effectively reduced the monostatic RCS. The field intensity inside the groove channel reveals that different RCS behaviors depend on the wave polarizations.

차세대 메모리 디바이스Gap-Fill 공정 위한 공간 분할 PE-ALD개발 및 공정 설계 (Development of Space Divided PE-ALD System and Process Design for Gap-Fill Process in Advanced Memory Devices)

  • 이백주;황재순;서동원;최재욱
    • 한국표면공학회지
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    • 제53권3호
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    • pp.124-129
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    • 2020
  • This study is for the development of high temperature ALD SiO2 film process, optimized for gap-fill process in manufacturing memory products, using a space-divided PE-ALD system equipped with an independent control dual plasma system and orbital moving unit. Space divided PE-ALD System has high productivity, and various applications can be applied according to Top Lid Design. But space divided ALD system has a limitation to realize concentric deposition map due to process influence due to disk rotation. In order to solve this problem, we developed an orbit rotation moving unit in which disk and wafer. Also we used Independent dual plasma system to enhance thin film properties. Improve productivity and film density for gap-fill process by having deposition and surface treatment in one cycle. Optimize deposition process for gap-fill patterns with different depths by utilizing our independently controlled dual plasma system to insert N2and/or He plasma during surface treatment, Provide void-free gap-fill process for high aspect ratio gap-fill patterns (up to 50:1) with convex curvature by adjusting deposition and surface treatment recipe in a cycle.

고준위폐기물처분장 공학적방벽의 갭채움재 기술현황 (R&D Review on the Gap Fill of an Engineered Barrier for an HLW Repository)

  • 이재완;최영철;김진섭;최희주
    • 터널과지하공간
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    • 제24권6호
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    • pp.405-417
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    • 2014
  • 고준위폐기물처분장에서 갭채움재는 완충재와 뒷채움재의 성능을 좌우하는 중요한 공학적방벽의 구성요소이다. 본 논문에서는 갭채움재에 대한 해외 기술현황을 조사하고, 이를 통하여 갭채움재의 개념, 제조기술, 성형특성, 설치기술에 대한 연구결과들을 정리하였다. 갭채움재 개념은 처분방식과 처분개념에 따라서 나라마다 약간씩 차이가 있었다. 갭채움재 물질로는 대부분 벤토나이트를 사용하였고, 충전제로 점토를 사용하였다. 갭채움재는 펠렛, 과립상, 또는 펠렛-과립상 혼합물의 형태로 사용되었다. 갭채움재 펠렛 제조에는 정압축, 롤러압축, 압출-컷팅 방법 등이 사용되었으며, 이 중, 실험과 실제 현장에서의 펠렛 소요량을 감안하여 많은 나라들이 롤러압축방법과 압출-컷팅방법에 대한 기술 확보에 집중하였다. 펠렛 성형특성 실험결과, 펠렛의 건조밀도와 건전성은 수분함량, 구성물질, 제조방법, 펠렛 크기에 민감하였고, 제작 시 압축하중에는 상대적으로 덜 민감하였다. 갭채움재의 설치방법으로는 수직처분공 완충재 갭에서는 부어넣기(pouring) 방법, 붓고 다지기(pouring and tamping) 방법, 진동을 주며 부어넣기(pouring with vibration) 방법 등이 시도되었으며, 수평처분공 완충재와 처분터널의 뒷채움재 갭에서는 숏크리트 기술을 이용한 불어넣기(blowing by use of shotcrete technology) 방법과 오거를 이용한 정치 및 다지기(auger placement and compaction) 방법 등이 시도되었다. 그러나 이 방법들은 아직 기술적으로 초기단계에 있어 앞으로도 계속적인 연구가 이루어질 것으로 예상되었다.

Dual Damascene 공정에서 Bottom-up Gap-fill 메커니즘을 이용한 Cu Plating 두께 최적화 (Cu Plating Thickness Optimization by Bottom-up Gap-fill Mechanism in Dual Damascene Process)

  • 유해영;김남훈;김상용;장의구
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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    • pp.93-94
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    • 2005
  • Cu metallization using electrochemical plating(ECP) has played an important role in back end of line(BEOL) interconnect formation. In this work, we studied the optimized copper thickness using Bottom-up Gap-fill in Cu ECP, which is closely related with the pattern dependencies in Cu ECP and Cu dual damascene process at 0.13 ${\mu}m$ technology node. In order to select an optimized Cu ECP thickness, we examined Cu ECP bulge, Cu CMP dishing and electrical properties of via hole and line trench over dual damascene patterned wafers split into different ECP Cu thickness.

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Gap-Fill Characteristics and Film Properties of DMDMOS Fabricated by an F-CVD System

  • Lee, Woojin;Fukazawa, Atsuki;Choa, Yong-Ho
    • 한국재료학회지
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    • 제26권9호
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    • pp.455-459
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    • 2016
  • The deposition process for the gap-filling of sub-micrometer trenches using DMDMOS, $(CH_3)_2Si(OCH_3)_2$, and $C_xH_yO_z$ by flowable chemical vapor deposition (F-CVD) is presented. We obtained low-k films that possess superior gap-filling properties on trench patterns without voids or delamination. The newly developed technique for the gap-filling of submicrometer features will have a great impact on IMD and STI for the next generation of microelectronic devices. Moreover, this bottom up gap-fill mode is expected to be universal in other chemical vapor deposition systems.

Mechanism Study of Flowable Oxide Process for Sur-100nm Shallow Trench Isolation

  • Kim, Dae-Kyoung;Jang, Hae-Gyu;Lee, Hun;In, Ki-Chul;Choi, Doo-Hwan;Chae, Hee-Yeop
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제40회 동계학술대회 초록집
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    • pp.68-68
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    • 2011
  • As feature size is smaller, new technology are needed in semiconductor factory such as gap-fill technology for sub 100nm, development of ALD equipment for Cu barrier/seed, oxide trench etcher technology for 25 nm and beyond, development of high throughput Cu CMP equipment for 30nm and development of poly etcher for 25 nm and so on. We are focus on gap-fill technology for sub-30nm. There are many problems, which are leaning, over-hang, void, micro-pore, delaminate, thickness limitation, squeeze-in, squeeze-out and thinning phenomenon in sub-30 nm gap fill. New gap-fill processes, which are viscous oxide-SOD (spin on dielectric), O3-TEOS, NF3 Based HDP and Flowable oxide have been attempting to overcome these problems. Some groups investigated SOD process. Because gap-fill performance of SOD is best and process parameter is simple. Nevertheless these advantages, SOD processes have some problems. First, material cost is high. Second, density of SOD is too low. Therefore annealing and curing process certainly necessary to get hard density film. On the other hand, film density by Flowable oxide process is higher than film density by SOD process. Therefore, we are focus on Flowable oxide. In this work, dielectric film were deposited by PECVD with TSA(Trisilylamine - N(SiH3)3) and NH3. To get flow-ability, the effect of plasma treatment was investigated as function of O2 plasma power. QMS (quadruple mass spectrometry) and FTIR was used to analysis mechanism. Gap-filling performance and flow ability was confirmed by various patterns.

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Effect of a Multi-Step Gap-Filling Process to Improve Adhesion between Low-K Films and Metal Patterns

  • Lee, Woojin;Kim, Tae Hyung;Choa, Yong-Ho
    • 한국재료학회지
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    • 제26권8호
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    • pp.427-429
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    • 2016
  • A multi-step deposition process for the gap-filling of submicrometer trenches using dimethyldimethoxysilane (DMDMOS), $(CH_3)_2Si(OCH_3)_2$, and $C_xH_yO_z$ by plasma enhanced chemical vapor deposition (PECVD) is presented. The multi-step process consisted of pre-treatment, deposition, and post-treatment in each deposition step. We obtained low-k films with superior gap-filling properties on the trench patterns without voids or delamination. The newly developed technique for the gap-filling of submicrometer features will have a great impact on inter metal dielectric (IMD) and shallow trench isolation (STI) processes for the next generation of microelectronic devices. Moreover, this bottom up gap-fill mode is expected to be universally for other chemical vapor deposition systems.

The effect of plamsa treatment on superconformal copper gap-fill

  • 문학기;김선일;박영록;이내응
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2009년도 제38회 동계학술대회 초록집
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    • pp.249-249
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    • 2010
  • The effect of forming a passivation layer was investigated in superconformal Cu gap-filling of the nano-scale trench with atomic-layer deposited (ALD)-Ru glue layer. It was discovered that the nucleation and growth of Cu during metal-organic chemical vapor deposition (MOCVD) were affected by hydrogen plasma treatments. Specifically, as the plasma pretreatment time increased, Cu nucleation was suppressed proportionally. XPS and Thermal Desorption Spectroscopy indicated that hydrogen atoms passivate the Ru surface, which leads to suppression of Cu nucleation owing to prevention of adsorption of Cu precursor molecules. For gap-fill property, sub 60-nm ALD Ru trenches without the plasma pretreatment was blocked by overgrown Cu after the Cu deposition. With the plasma pretreatment, superconformal gap filling of the nano-scale trenches was achieved due to the suppression of Cu nucleation near the entrances of the trenches. Even the plasma pretreatment with bottom bias leads to the superconformal gap-filling.

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Failure Analysis for High via Resistance by HDP CVD System for IMD Layer

  • Kim, Sang-Yong;Chung, Hun-Sang;Seo, Yong-Jin
    • Transactions on Electrical and Electronic Materials
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    • 제3권4호
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    • pp.1-4
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    • 2002
  • As the application of semiconductor chips into electronics increases, it requires more complete integration, which results in higher performance. And it needs minimization in device design for cost saving of manufacture. Therefore oxide gap fill has become one of the major issues in sub-micron devices. Currently HDP (High-Density Plasma) CVD system is widely used in IMD (Inter Metal Dielectric) to fill narrower space between metal lines. However, HDP-CVD system has some potential problems such as plasma charging damage, metal damage and etc. Therefore, we will introduce about one of via resistance failure by metal damage and a preventive method in this paper.

차세대 STI Gap Fill 방법의 연구

  • 유진혁;김희대;한정훈;강대봉;이대우;서승훈;이내응;손종원
    • 한국표면공학회:학술대회논문집
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    • 한국표면공학회 2007년도 춘계학술발표회 초록집
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    • pp.151-152
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    • 2007
  • 최근들어 Device 크기가 100nm 이하로 줄어듦에 따라 High Density Plasma Chemical Vapor Deposition(HDP-CVD) 기술로는 100nm 이하의 gap에 Aspect ratio가 6:1 이상 되는 STI(Shallow Trench Isolation) 구조를 Void 없이 채우는 것이 불가능해 지고 있다. 이를 극복하기 위하여 여러 방면으로 연구가 수행되어지고 있다. 그 방법 중의 하나인 Dep/Etch/Dep Cycle이 이번 연구에서 사용되었으며, 일반적인 HDP CVD보다 더 낮은 압력에서 증착과 식각이 수행되었다. 그 결과 다른 여러 방법들보다 좋은 막질을 얻을 수 있었으며, Gap fill 성능을 향상 시킬 수 있었다.

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