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http://dx.doi.org/10.4313/TEEM.2002.3.4.001

Failure Analysis for High via Resistance by HDP CVD System for IMD Layer  

Kim, Sang-Yong (ANAM Semiconductor Co., LTD)
Chung, Hun-Sang (Department of Electrical Engineering, Chosun University)
Seo, Yong-Jin (Department of Electrical & Electronics Engineering, Daebul University)
Publication Information
Transactions on Electrical and Electronic Materials / v.3, no.4, 2002 , pp. 1-4 More about this Journal
Abstract
As the application of semiconductor chips into electronics increases, it requires more complete integration, which results in higher performance. And it needs minimization in device design for cost saving of manufacture. Therefore oxide gap fill has become one of the major issues in sub-micron devices. Currently HDP (High-Density Plasma) CVD system is widely used in IMD (Inter Metal Dielectric) to fill narrower space between metal lines. However, HDP-CVD system has some potential problems such as plasma charging damage, metal damage and etc. Therefore, we will introduce about one of via resistance failure by metal damage and a preventive method in this paper.
Keywords
HDP (High-Density Plasma); plasma charging damage; metal damage; Gap fill; IMD (Inter Metal Dielectric); Via Resistance;
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