• Proceedings of the KIPE Conference
• /
• 2017.07a
• /
• pp.18-19
• /
• 2017

This paper shows the design of the high voltage capacitor charger which using a modified series parallel resonant converter. The used silicon carbide Metal-Oxide Semiconductor Field Effect Transistor (SiC MOSFET) is proper for the few hundred kHz of high switching frequency to overcome the bulk resonant inductor and snubber capacitors. Furthermore, to increase the amount of the charging current, three phase delta transformer is used as well as the secondary sides are connected in parallel. In this paper, the design procedure of the high voltage capacitor charger is suggested and the output power is verified by the experimental results with the rated resistor load.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.13 no.4
• /
• pp.272-281
• /
• 2013

This paper presents low power frequency shift keying (FSK) transmitter using all digital PLL (ADPLL) for smart utility network (SUN). In order to operate at low-power and to integrate a small die area, the ADPLL is adopted in transmitter. The phase noise of the ADPLL is improved by using a fine resolution time to digital converter (TDC) and digitally controlled oscillator (DCO). The FSK transmitter is implemented in $0.18{\mu}m$ 1-poly 6-metal CMOS technology. The die area of the transmitter including ADPLL is $3.5mm^2$. The power consumption of the ADPLL is 12.43 mW. And, the power consumptions of the transmitter are 35.36 mW and 65.57 mW when the output power levels are -1.6 dBm and +12 dBm, respectively. Both of them are supplied by 1.8 V voltage source. The frequency resolution of the TDC is 2.7 ps. The effective DCO frequency resolution with the differential MOS varactor and sigma-delta modulator is 2.5 Hz. The phase noise of the ADPLL output at 1.8 GHz is -121.17 dBc/Hz with a 1 MHz offset.

• Journal of Advanced Navigation Technology
• /
• v.21 no.3
• /
• pp.220-229
• /
• 2017

In this paper, To take advantage a variety of DC power as the boost DC-DC converter design specifications through the inductor L and capacitor C through PSPICE to calculate the best estimate of the value. Boost DC-DC converter with a switch device using IRF840 and reverse recovery time Schottky diodes with excellent with constant current controller using D10SC6M and resistance can be configured to considering the Power LED Module was driven by the production. Converter's switching frequency is 50 kHz, the first Duty Rate was made to increase gradually depending on the value of the detection were, 10 % in the output voltage. As a result, the simulated Boost Power LED driver characteristics is in comparison with the design specifications, 5% or less as the error was approximated. Finally, when input 15 V were offered, a stable output 24 V were obtained. and Dimming Control through the adjustment of brightness and current consumption were possible.

• Journal of Sensor Science and Technology
• /
• v.31 no.2
• /
• pp.115-119
• /
• 2022

A readout circuit for a mercury-cadmium-telluride (MCT)-amplified mid-wave infrared (IR) photodetector was realized and applied to noncontact chemical agent detectors based on a quantum cascade laser (QCL). The QCL emitted 250 times for each wavelength in 0.2-㎛ steps from 8 to 12 ㎛ with a frequency of 100 kHz and duty ratio of 10%. Because of the nonconstant QCL emission power during on-duty, averaging the photodetector signals is essential. Averaging can be performed in digital back-end processing through a high-speed analog-to-digital converter (ADC) or in analog front-end processing through an integrator circuit. In addition, it should be considered that the 250 IR data points should be completely transferred to a PC during each wavelength tuning period of the QCL. To average and minimize the IR data, we designed a readout circuit using the analog front-end processing method. The proposed readout circuit consisted of a switched-capacitor integrator, voltage level shifter, relatively low-speed analog-to-digital converter, and micro-control unit. We confirmed that the MCT photodetector signal according to the QCL source can be accurately read and transferred to the PC without omissions.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.6 no.2
• /
• pp.151-158
• /
• 2002

In this paper, Phase locked microwave oscillator having the low phase noise and high stability for digital MMDS down converter was designed. we have been analyzed the low phase noise properties by the active device nonlinear equivalent circuits and derived the necessary and sufficient conditions for high stable voltage control oscillator. And it is applied to phase locked loop, we design the phase locked microwave oscillator of frequency synthesizer. Experimental results of designed phase locked oscillator shows -85dBc/Hz @ 10KHz phase noise properties and simulation result is -90Bc/Hz @ 10kHz respectively we shows that proposed low phase noise and stable conditions of phase locked microwave oscillator can be applied to design the high stable digital MMDS frequency synthesizer.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.35 no.5A
• /
• pp.504-512
• /
• 2010

The paper proposes the 6bit 800MS/s flash A/D converter that can be applied to wireless USB chip-set. The paper simplified the error correction circuit and synchronization block as one circuit which are used respectively, and furthermore reduced the burden on the hardware. Comparing to the conventional error correction circuit, the proposed error correction circuit in this paper reduced 5 MOS transistors, the area of each error correction circuit is reduced by 9%. The A/D converter is fabricated with 0.18um CMOS 1-poly 6-metal process, and power dissipation is 182mW at 0.8Vpp input range and 1.8V supply voltage. The measured result shows 4.0bit of ENOB at 800MS/s conversion rate and 128.1MHz input frequency.

• Journal of Power Electronics
• /
• v.17 no.5
• /
• pp.1363-1371
• /
• 2017

In this paper, an improved Direct Power Control (DPC) algorithm is presented for grid connected three phase PWM rectifiers. The new DPC approach is based on two main tasks. First the optimization of the look-up table, which is well-known in conventional DPC, is outlined for selecting the optimum converter output voltage vectors. Secondly a very simple and effective method is used to directly calculate their duty cycles from the power errors. Therefore, the measured active and reactive powers are made to track their references using hysteresis controllers. Then two vectors are selected and applied during one control cycle to minimize both the active and reactive power ripples. The main advantages of this method are that there is no need of linear current controllers, coordinates transformations or modulators. In addition, the control strategy is able to operate at constant switching frequencies to ease the design of the power converter and the AC harmonic filter. The control exhibits a good steady state performance and improves the dynamic response without any overshoot in the line current. Theoretical principles of the proposed method are discussed. Both simulation and experimental results are presented to verify the performance and effectiveness of this control scheme.

• Proceedings of the IEEK Conference
• /
• 2001.09a
• /
• pp.777-783
• /
• 2001

This paper is mainly concerned with the state of the practical developments of a constants PWM bridge type resonants DC-DC suitable converter for Nd:YAG Laser with a Microprocessor. (PIC16C54 & 8051) The use of IGBT power supply with feedback control of flashLamp currents imparts a advantages to Nd:YAG Laser for materials processing. these include the alility to tailor the pulseshape and modify pulse parameters on a pulse- by pulse basis. And Correct choice of pulseshape can enhance the repeatability of the process. as higher power IGBT became available, act ive pulseforming power supplies will find greater user in deep hole drilling machine By Using certain control tecniques, utililized in designing Pic16c54 from Microchip technology and Intel 8051, also Mornitoring from Microsoft Visual Basic 5, And it allowed us to designed and fabricate ahigh repel it ion rate and high power(HRHP) pulsed Nd:YAG laser system, As a result of that, the current pulsewidth could be contort led 200s to 350s(step 50s) , and the pulse repetition rate could be adjusted 500pps to 1150pps. In addition, in the case of one laser head consisting of a Nd:YAG laser rod and two flashlamps , the maximum laser output of 240w was produced at the condition of 350s and 1150pps, and that of about 480w was generated at the same condition when two laser heads were arranged in cascade.

• Journal of Power Electronics
• /
• v.17 no.4
• /
• pp.914-922
• /
• 2017

Multilevel converters have attracted a lot of attention in recent years. The efficiency parameters of a multilevel converter such as the switching losses and total harmonic distortion (THD) mainly depend on the modulation strategy used to control the converter. Among all of the modulation techniques, the selective harmonic elimination (SHE) method is particularly suitable for high-power applications due to its low switching frequency and high quality output voltage. This paper proposes a new expression for the SHE problem in five-level converters. Based on this new expression, a simple analytical method is introduced to determine the feasible modulation index intervals and to calculate the exact value of the switching angles. For each selected harmonic, this method presents three-level or five-level waveforms according to the value of the modulation index. Furthermore, a flowchart is proposed for the real-time implementation of this analytical method, which can be performed by a simple processor and without the need of any lookup table. The performance of the proposed algorithm is evaluated with several simulation and experimental results for a single phase five-level diode-clamped inverter.

• Journal of Power Electronics
• /
• v.11 no.3
• /
• pp.271-278
• /
• 2011

This paper presents a LLC resonant controller IC for secondary side control without external active devices to achieve low profile and low cost LED back light units. A gate driving transformer is adopted to isolate the primary side and the secondary side instead of an opto-coupler. A new integrated dimming circuitry is proposed to improve the dynamic current control characteristic and the current density of a LED for the brightness modulation of a large screen LCD. A dual-slope clock generator is proposed to overcome the frequency error due to the under shoot in conventional approaches. This chip is fabricated using 0.35 ${\mu}m$ BCD technology and the die size is $2{\times}2\;mm^2$. The frequency range of the clock generator is from 50 kHz to 500 kHz and the range of the dead time is from 50 ns to 2.2 ${\mu}s$. The efficiency of the LED driving circuit is 97 % and the current consumption is 40 mA for a 100 kHz operation frequency from a 15 V supply voltage.