• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.4
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• pp.303-309
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• 2013

A low power 6-bit flash ADC that uses an input voltage range detection algorithm is described. An input voltage level detector circuit has been designed to overcome the disadvantages of the flash ADC which consume most of the dynamic power dissipation due to comparators array. In this work, four digital input voltage range detectors are employed and each input voltage range detector generates the specific clock signal only if the input voltage falls between two adjacent reference voltages applied to the detector. The specific clock signal generated by the detector is applied to turn the corresponding latched comparators on and the rest of the comparators off. This ADC consumes 68.82mW with a single power supply of 1.2V and achieves 4.9 effective number of bits for input frequency up to 1MHz at 500 MS/s. Therefore it results in 4.75pJ/step of Figure of Merit (FoM). The chip is fabricated in 0.13-um CMOS process.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1984-1987
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• 2002

This paper describes the design and implementation of a single-chip digitally synthesized 0-35MHz agile function generator. The chip comprises an integrated direct digital synthesizer (DDS) with a 10-bit on- chip digital-to-analog converter (DAC) using an n-well single-poly triple-metal 0.5-$\mu\textrm{m}$ CMOS technology. The main features of the chip include maximum clock frequency of 100 MHz at 3.3-V supply voltage, 32-bit frequency tuning word resolution, 12-bit phase tuning word resolution, and an on-chip 10-bit DAC. The chip provides sinusoidal, ramp, saw-tooth, and random waveforms with phase and frequency modulation, and power-down function. At 100-MHz clock frequency, the chip covers a bandwidth from dc to 35 MHz in 0.0233-Hz frequency steps with 190-ns frequency switching speed. The complete chip occupies 12-mm$^2$die area and dissipates 0.4 W at 100-MHz clock frequency.

• Journal of Power Electronics
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• v.15 no.6
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• pp.1499-1507
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• 2015

High voltage direct current transmission based on modular multilevel converter (MMC-HVDC) is one of the most promising power transmission technologies. In this study, the mathematical characteristics of MMC-HVDC are analyzed in a synchronous rotational reference frame. A hybrid current vector controller based on proportional integer plus resonant is used to uniformly control the DC and double-base frequency AC currents under unbalanced grid voltage conditions. A corresponding voltage dependent current order limiter is then designed to solve the overcurrent problems that may occur. Moreover, the circulating current sequence components are thoroughly examined and controlled using a developed circulating current suppressor. Simulation results verify the correctness and effectiveness of the proposed control schemes.

• Proceedings of the KIPE Conference
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• 2003.07b
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• pp.880-885
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• 2003

Using a Assistance Power Sources of the Railroad Vehicles Three-Level ZVZCS DC/DC Converter is presented in this paper. The proposed three-Level DC/DC Converter Is to achieved zero voltage and zero current switching for the two Main switches. phase shift method is used a parastic capacitance by reverse recovery characteritics in a inner diode of the switching device. Also. using a diode second part of the Transformer by the simple auxiliary circuit for the achieved zero current switching of the Auxiliary switch. For the ZVZCS movement of the all switching devices is analyzed and verified under a 5kW, in the 100kHz switching frequency.

• Proceedings of the KIEE Conference
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• 1990.07a
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• pp.383-386
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• 1990

This paper concerns a DC-DC converter using the characteristic of series resonance. Operation principle of the system described by the proposed equation is illustrated. Characteristics of steady state of the system which is essential to system design is evaluated for frequency and pulse width characteristic using dimensionless parameter. The proposed circuit based in constant voltage control uses the Pulse Width Modulation - Time Ratio Control method.

• Proceedings of the KIEE Conference
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• 1998.07f
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• pp.2039-2041
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• 1998

In this paper, Operation characteristics of the active clamp(ACL) zero-voltage-switching(ZVS) forward converter(FC) and active clamp hard- switching(HS) forward converter are compared with respect to loss analysis. The losses of semiconductor (including conduction losses and switching losses), transformer(containing the core loss and copper loss) and parasitic element of passive element (capacitor, inductor) are measured and compared for each type. For an experiment we have built 50W ACL ZVS-FC and ACL HS-FC, in which the switching frequency is 200kHz, and test it. The experimental results show that both types of operation have nearly same characteristics.

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.546-548
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• 2005

This paper proposes a unity power factor ZVT PWM single-phase rectifier. The ZVT soft switching are achieved by using a simple ZVT circuit, and the reduced conduction losses are achieved by employing a single-stage converter, instead of a typical double-stage converter composed of front end diode rectifier and cascaded boost rectifier. Furthermore, thanks to good features such as simple PWM control at constant frequency, low switch stress and low VAR rating of commutation circuits, it is suitable for high power applications. The principle of operation is explained in detail, and simulation results of the new converter are also included.

• Proceedings of the KIEE Conference
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• 2005.04a
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• pp.164-167
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• 2005

This paper present ZVS Half-Bridge converter Using IM(Integrated Magnetics). In converter system, magnetic components are important devices used for energy storage, energy transfer, galvanic isolation and filtering. The purposes of IM(Integrated Magnetics) are to reduce the number of magnetic components and voltage/current ripple. This topology is use of three magnetics components thus increasing the cost and size of the system. A prototype featuring 300V input, 15V output, 400kHz switching frequency, and 150W output power.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.2
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• pp.209-216
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• 2001

The conventional three-level high frequency phase-shifted dc/dc converter has a disadvantage that a circulating current flows through transformer and switching devices during the freewheeling interval. Due to this circulating current and RMS current stress, conduction losses of transformer and switching devices increases. To alleviate these problems, we propose an improved three-level Zero Voltage and Zero Current Switchig (ZVZCS) dc/dc converter using a tapped inductor, a snubber capacitor and two snubber diodes attached at the secondary side of transformer. The proposed ZVZCS converter is verified on a 7kW, 30kHz experimental prototype.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.379-380
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• 2012

A bidirectional full-bridge CLLC resonant converter using a digital control method is proposed for a LVDC power distribution system. This converter can operate under high power conversion efficiency since the CLLC resonant network has soft switching capability for primary switches and output rectifiers. In addition, the power conversion efficiency of any directions is exactly the same as each other because of the symmetric structure of the converter. Intelligent digital control methods are proposed to regulate output voltage under any power flow directions. A 5kW prototype converter was designed for a high-frequency galvanic isolation of 380V dc buses using a digital signal processor to verify the performance of the proposed topology and algorithms.