• ETRI Journal
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• v.34 no.2
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• pp.210-215
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• 2012

In this paper, a group delay time controller (GDTC) is proposed based on a reflection topology employing a parallel resonator as the reflection termination. The design equations of the proposed GDTC have been derived and validated by simulation and experimental results. The group delay time can be varied by varying the capacitance and inductance at an operating frequency. To show the validity of the proposed circuit, an experiment was performed for a wideband code division multiple access downlink band operating at 2.11 GHz to 2.17 GHz. According to the experiment, a group delay time variation of $3{\pm}0.17$ ns over bandwidth of 60 MHz with excellent flatness is obtained.

• Journal of electromagnetic engineering and science
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• v.19 no.1
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• pp.56-63
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• 2019

Typical negative group delay circuits (NGDC) are analyzed in terms of signal attenuation, group delay, and bandwidth using S-parameters. By inverting these formulations, we derive and present the design equations (for NGD circuit elements) for a desired specification of the two among the three parameters. The proposed design method is validated through simulation examples for narrow- and wide-band pulse inputs in the time and frequency domains. Moreover, an NGDC composed of lumped elements is fabricated at 1 GHz for measurement. As a function of frequency, the circuit-/EM-simulated and measured group delays are in good agreement. The provided simple NGDC design equations may be useful for many applications that require compensations of some signal delays.

• Journal of the Korea Society of Computer and Information
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• v.18 no.7
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• pp.79-84
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• 2013

In this paper, the method of multiple PS(pilot symbol) QAM channel compensation is suggested in order to analyze and improve occurring problems in case of delay waves in Frequency-Selective Rayleigh fading channels through Pilot Symbol Assisted Modulation(PSAM) which is a method predicting and compensating fading information, using Pilot Symbol in flat fading channels. This suggested method shows stable improvement in its performance even though it is effected by the level of delay on delay waves while the existing PSAM method has severe malfunction with a small amount of level of delay on delay waves regardless of signal-to-noise ratio(SNR).

• Journal of electromagnetic engineering and science
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• v.16 no.1
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• pp.7-12
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• 2016

This paper presents the design of a negative group delay circuit (NGDC) using the filter synthesis approach. The proposed design method is based on a frequency transformation from a low-pass filter (LPF) to a bandstop filter (BSF). The predefined negative group delay (NGD) can be obtained by inserting resistors into resonators. To implement a circuit with a distributed transmission line, a circuit conversion technique is employed. Both theoretical and experimental results are provided for validating of the proposed approach. For NGD bandwidth and magnitude flatness enhancements, two second-order NGDCs with slightly different center frequencies are cascaded. In the experiment, group delay of $5.9{\pm}0.5ns$ and insertion loss of $39.95{\pm}0.5dB$ are obtained in the frequency range of 1.935-2.001 GHz.

• Structural Engineering and Mechanics
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• v.83 no.1
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• pp.93-108
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• 2022

Real-time hybrid simulation (RTHS) was applied to investigate the train-bridge interaction of a high-speed railway system, where the railway bridge was selected as the numerical substructure, and the train was physically tested. The interaction between the two substructures was reproduced by a servo-hydraulic shaking table. To accurately reproduce the high-frequency interaction responses ranging from 10-25Hz using the hydraulic shaking table with an inherent delay of 6-50ms, an adaptive time series (ATS) compensation algorithm combined with the linear quadratic Gaussian (LQG) was proposed and implemented in the RTHS. Testing cases considering different train speeds, track irregularities, bridge girder cross-sections, and track settlements featuring a wide range of frequency contents were conducted. The performance of the proposed ATS+LQG delay compensation method was compared to the ATS method and RTHS without any compensation in terms of residual time delays and root mean square errors between commands and responses. The effectiveness of the ATS+LQG method to compensate time delay in RTHS with high-frequency responses was demonstrated and the proposed ATS+LQG method outperformed the ATS method in yielding more accurate responses with less residual time delays.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.9 s.339
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• pp.19-28
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• 2005

We establish a statistical model for the ultra-wide bandwidth (UMB) indoor channel based on over 2000 frequency response measurements campaign in a Practical apartment. The approach is based on the investigation of the statistical properties of the multipath profiles measured in different place with different rooms. Based on the experimental results, a characterization of the propagation channel from theoretic view point is described. Also we describe a method for measurement of the channel impulse response and channel transfer function. Using the measured data, the authors compares channel impulse responses obtained from time-domain and channel transfer functions obtained from frequency-domain with statistical path loss model. The bandwidth of the signal used in this experiment is from 10MHz to 8.01 GHz. The time-domain results such as maximum excess delay, men excess delay and ms delay spread are presented. As well as, omni-directional biconical antenna were used for transmitter and receiver In addition, measurements presented here support m channel model including the antenna characteristics.

• The Journal of the Acoustical Society of Korea
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• v.40 no.5
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• pp.460-465
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• 2021

In active sonar, time delay estimation is used to find the distance between the target and the sonar. Among the time delay estimation methods for active sonar, estimation in the frequency domain is widely used. When estimating in the frequency domain, the time delay can be thought of as a frequency estimator, so it can be used relatively easily. However, this method is prone to rapid increase in error due to noise. In this paper, we propose a new method which applies weighted dictionary and sparsity in order to reduce this error increase and we extend it to two receivers to propose an algorithm for estimating the time delay between two receivers. And the case of applying the proposed method and the case of not applying the proposed method including the conventional frequency domain algorithm and Generalized Cross Correlation-Phase transform (GCC-PHAT) in a white noise environment were compared with one another. And we show that the newly proposed method has a performance gain of about 15 dB to about 60 dB compared to other algorithms.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1041-1044
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• 2003

In this paper, a new CMOS fully integrated frequency-to-digital converter is proposed. The operation of the proposed circuit is based on a pulse-shrinking delay element. In the proposed circuit, a resolution of the converted digital output can be easily improved by increasing the number of the pulse-shrinking element. Also the input frequency range can be easily changed through controlling bias voltage in the pulse-shrinking element. The simulation of the designed circuit carried out by HSPICE using the CMOS 0.35${\mu}{\textrm}{m}$ process technology.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.3
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• pp.179-192
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• 2008

A multiphase compensation method with mismatch linearization technique, is presented and demonstrated in a $\Sigma-\Delta$ fractional-N frequency synthesizer. An on-chip delay-locked loop (DLL) and a proposed delay line structure are constructed to provide multiphase compensation on $\Sigma-\Delta$ quantizetion noise. In the delay line structure, dynamic element matching (DEM) techniques are employed for mismatch linearization. The proposed $\Sigma-\Delta$ fractional-N frequency synthesizer is fabricated in a $0.18-{\mu}m$ CMOS technology with 2.14-GHz output frequency and 4-Hz resolution. The die size is 0.92 mm$\times$1.15 mm, and it consumes 27.2 mW. In-band phase noise of -82 dBc/Hz at 10 kHz offset and out-of-band phase noise of -103 dBc/Hz at 1 MHz offset are measured with a loop bandwidth of 200 kHz. The settling time is shorter than $25{\mu}s$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.3
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• pp.269-281
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• 2014

In this paper, a systematic design of a low phase noise voltage-tuned dielectric resonator oscillator(VTDRO) using loop group delay is proposed. Designed VTDRO is closed-loop type and consists of a cascade connection of a resonator, phase shifter, and amplifier. Firstly, a reference VTDRO is fabricated and its phase noise and electrical frequency tuning range are measured. Both the phase noise and electrical frequency tuning range depend on the loop group delay. Then, a required value of loop group delay for a new VTDRO with a low phase noise can be systematically computed. In addition, its phase noise and electrical frequency tuning range can be theoretically estimated using those obtained from the measurement of the reference VTDRO. When the loop group delay increases, the phase noise decreases and the electrical frequency tuning range also decreases. The former predominantly depends on the resonator structure. Therefore we propose a systematic design procedure of a resonator with high group delay characteristics. The measured loop group delay of the new VTDRO is about 700 nsec. The measured phase noise of the new VTDRO show a state-of-the-art performance of 154.5 dBc/Hz at 100 kHz frequency offset and electrical frequency tuning range of 448 kHz for a voltage change of 0~10V. The oscillation power is about 4.39 dBm.