• The Journal of Korean Institute of Communications and Information Sciences
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• v.39A no.6
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• pp.333-342
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• 2014

The pilot assisted channel frequency response (CFR) estimation schemes for an OFDM-based system with virtual subcarriers are analyzed under the assumption that pilot symbols are located according to a comb-type pattern in the OFDM block. In particular, as the minimum mean square error (MMSE) based scheme aiming to directly predict the channel impulse response and the MMSE based scheme aiming to suppress the leakage have not been clearly compared, by proving that the mean square errors (MSEs) of the latter scheme is always larger than that of the former scheme, this paper shows that the former scheme is superior to the latter scheme. Moreover, the impact of the number of pilots on the performances of the MMSE and least-square based channel estimation schemes are investigated. The performance analyses of the presented schemes are confirmed by computer simulation.

• Journal of Korea Multimedia Society
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• v.9 no.5
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• pp.542-553
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• 2006

Because Y and C signals in a composite video signal are piled one on another in the same frequency, it is impossible to separate them completely. Therefore, it is necessary to develop efficient separation technique in order to minimize degradation of video quality. In this paper, we propose wavelet-based 3D comb filter algorithm and architecture for separating Y and C signals from a composite video signal. The proposed algorithm uses wavelet transform and thresholding of compared lines for acquiring the maximum video quality. Simulation results show that the proposed algorithm has better image quality and better PSNR than previous algorithms. For real application of the proposed algorithm, we developed a hardware architecture and the architecture was implemented by using VHDL. Finally, a VLSI layout of the proposed architecture was generated by using 0.25 micrometer CMOS process.

• Journal of Institute of Control, Robotics and Systems
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• v.16 no.9
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• pp.872-875
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• 2010

This paper describes new harmonic disturbance compensation based on a peak filter array for Hard Disk Drives. Unlike a conventional method, the proposed method does not require any sin/cos functions or tables and reduces effects of all harmonic disturbances within a nyquist frequency. Two factors are introduced to parameterize stability and a gain tune. In addition, it is verified that the order of the proposed filter is minimal. From 600 experimental results, 8.5% performance improvement is achieved.

• Proceedings of the Optical Society of Korea Conference
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• 2009.10a
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• pp.241-242
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• 2009

Characterics of carrier-envelope-offset frequency ($f_{ceo}$) of a femtosecond laser stabilized by the direct locking method were investigated using two f-to-2f interferometers. The stability of $f_{ceo}$ was comaparable to that achieved with a conventional PLL method.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.6C
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• pp.777-784
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• 2004

In this paper, a new filter structure to improve frequency response characteristics in decimation filter using CIC(Cascaded Integrator-Comb) filters and half band filters is proposed. Conventional filters improve only passband characteristics, but we propose a new filter which can improve stop band and pass band characteristics simultaneously. Since proposed filter needs only two multiplication, additional implementation cost is not much. And overall linear phase characteristics are maintained since the proposed filter is also linear phase. Finally, filter coefficients quantization effects ate discussed after Verilog-HDL coding.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.1 s.92
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• pp.78-83
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• 2005

LTCC filters have been widely used to wireless terminals. They generally adopt the multilayer structure. Some of multilayer LTCC filters are made of symmetrical parallel-coupled lines and anti-symmetrical parallel-coupled lines to reduce the length of resonators. The equivalent circuit of parallel-coupled lines was analyzed and applied to bandpass filters using multilayer parallel-coupled line resonators. The three-pole bandpass filter with the center frequency of 2.45 GHz is designed by using the proposed equivalent circuit and the measured results have good agreement with the design results.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.6C
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• pp.609-614
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• 2003

In this paper, a new filter structure to improve frequency response characteristics in CIC(Cascaded Integrator-Comb) decimation filters is proposed. Conventional filters improve passband characteristics, but they make worse aliasing band characteristics. In this paper, we propose a new filter which is called IFOP(Interpolated Fourth-Order Polynomials). By using this proposed filter, passband droop and aliasing band attenuation are simultaneously improved. Since proposed filter needs only one multiplication, computation is not much. And overall linear phase characteristics are maintained since the proposed filter is also linear phase. Finally, implementation cost of the proposed filter is compared with those of conventional filters.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.4 s.304
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• pp.153-158
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• 2005

In this paper, a filter is proposed to compensate droop of the CIC filter for SDR. The proposed compensation filter has almost linear-phase characteristic, requires low operational complexity, and is cost-effective due to its second-order characteristic and lowest operational rate in the baseband.. Especially, it compensates droop in the passband with little performance degradation in the stopband. It is shown, by a design example and its performance analysis, that the proposed compensation method gives performance enhancement in communication systems. It is also shown that the proposed method is superior to conventional ones in view of memory usage and computational load.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.2
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• pp.115-123
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• 2009

In this paper, we extract the parasitic elements of the transmission line with the defected ground structure(DGS) and the short-circuited comb line section using the Short-Open Calibration(SOC). The scattering matrixes of short, open and the distributed elements in microstrip line are measured by full electro-magnetic(EM) simulator and Vector Network Analyser(VNA). The electro-magnetic effects of the proposed structures are considered by the II and T equivalent circuits with frequency independent elements, and the relations between the measured scattering parameters and the elements in the circuits are shown by performing 2 port network analysis. Moreover, to design the 2.4 GHz bandpass filter with second order butterworth prototype, the proposed methods are applied. As results, the measured $S_{11}$ and $S_{21}$ indicate -20 dB and -1.3 dB at center frequency, and these are shown within 5 % error compare to the predicted results at $0.5{\sim}5\;GHz$.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.11
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• pp.141-148
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• 2012

A design of a 32-bit fourth-stage decimation filter decimation filter used in sigma-delta analog-to-digital (A/D) converter is proposed in this work. A four-stage decimation filter with down-sampling factor of 512 and 32-bit output is developed. A multi-stage cascaded integrator-comb (CIC) filter, which reduces the sampling rate by 64, is used in the first stage. Three half-band FIR filters are used after the CIC filter, each of which reduces the sampling rate by two. The pipeline structure is applied in the CIC filter to reduce the power consumption of the CIC. The Canonic Signed Digit (CSD) arithmetic is used to optimize the multiplier structure of the FIR filter. This filter is implemented based on a semi-custom design flow and a 130nm CMOS standard cell library. This decimation filter operates at 98.304 MHz and provides 32-bit output data at an audio frequency of 192 kHz with power consumption of $697{\mu}W$. In comparison to the previous work, this design shows a higher performance in resolution, operation frequency and decimation factor with lower power consumption and small logic utilization.