• Title/Summary/Keyword: forward converter

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Super-Lift DC-DC Converters: Graphical Analysis and Modelling

  • Zhu, Miao;Luo, Fang Lin
    • Journal of Power Electronics
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    • v.9 no.6
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    • pp.854-865
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    • 2009
  • Super-lift dc-dc converters are a series of advanced step-up dc-dc topologies that provide high voltage transfer gains by super-lift techniques. This paper presents a developed graphical modelling method for super-lift converters and gives a thorough analysis with a consideration of the effects caused by parasitic parameters and diodes' forward voltage drop. The general guidelines for constructing and deriving graphical models are provided for system analysis. By applying it to examples, the proposed method shows the advantages of high convenience and feasibility. Both the circuit simulation and experimental results are given to support the theoretical analysis.

Analysis of an Active Clamp Forward Converter with Current-Doubler Rectifier (전류 증배 정류회로를 이용한 능동 클램프 포워드 컨버터의 분석)

  • Jang, Paul;Cho, Bohyung
    • Proceedings of the KIPE Conference
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    • 2012.11a
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    • pp.44-45
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    • 2012
  • 본 논문에서는 전류 증배 정류회로를 이용한 능동 클램프 포워드 컨버터의 정상상태를 분석한다. 기존 분석들 대비 변압기의 누설 인덕턴스와 전류 증배 정류회로에서의 전류 불균형 현상을 고려하여 회로 동작의 정확한 이해를 도모한다. 분석 결과의 타당성은 100W급 (3.3-V/30.3-A) 모의 실험을 통해 검증한다.

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Forward Converter using Planar transformer and Lossless Snubber (Planar 변압기와 무손실 스너버를 사용한 포워드 컨버터)

  • 박경수;이재학;김춘삼;김윤호
    • Proceedings of the KIPE Conference
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    • 1999.07a
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    • pp.480-484
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    • 1999
  • In this paper, a design technique of SMPS using plannar transformer is described. The application of plannar transformer can solve the space problem which occurs when it is installed on PCB since plannar transformer has low profile. In addition a lossless snubber circuit added to reduce the device stress and to improve the system efficiency. The designed system is verifed by simulation and experiment with comparison of efficiency between the system using conventional transformer and the system using plannar transformer.

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A Single Stage Isolated Power Factor Correction Using clamping Circuit (클램핑 회로를 이용한 단계층 절연 역률 보정)

  • 서재호;이희승
    • Proceedings of the KIPE Conference
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    • 1998.07a
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    • pp.319-322
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    • 1998
  • In this paper we further propose to add a very simple regenerative clamping circuit to SSIPP to reduce the voltage stress and to recycle the energy trapped in the leakage inductance of the isolation transformer, thus eliminating the need for a lossy snubber circuit. In addition, this proposed clamping circuit also provides a mechanism to reset the magnetizing current of the output transformer of SSIPP employing a Forward converter as the output stage. Simulations and experimental results are reported to verify the operation and performance of the SSIPP with regenerative clamping.

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An Active Output Filter with a Novel Control Strategy for Passive Output Filter Reduction

  • Choi, Kyusik;Cho, Bo-Hyung
    • Journal of Power Electronics
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    • v.16 no.3
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    • pp.1036-1045
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    • 2016
  • This paper presents a novel control strategy for passive output filter reduction using an active output filter. The proposed method achieves the dual-function of regulating the output voltage ripple and output voltage variation during load transients. The novel control strategy allows traditional simple voltage controllers to be used, without requiring the expensive current sensors and complex controllers used in conventional approaches. The proposed method is verified with results from a 125-W forward converter.

A Study on the ZVZCS Dual TTFC without Primary Freewheeling Diodes (1차측 환류다이오드를 제거한 ZVZCS Dual TIFC에 관한 연구)

  • Han, Kyung-Tae;Kim, Yong;Bae, Jin-Yong;Lee, Eun-Young;Lee, Dong-Hyun
    • Proceedings of the KIEE Conference
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    • 2003.07b
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    • pp.1160-1162
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    • 2003
  • This paper presents ZVZCS(Zero-Voltage and Zero-Current Switching) Dual TTFC(Two-Transistor Forward Converter) without primary freewheeling diodes. The principle of operation, feature and design considerations are illustrated and verified through the ecperiment with a 1.8kW 55kHz MOSFET based experimental circuit.

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Boost type output-series forward-flyback converter (승압형 출력-직렬 포워드-플라이백 컨버터)

  • Lee, Jong-Hyun;Jung, An-Yeol;Park, Joung-Hu
    • Proceedings of the KIPE Conference
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    • 2010.11a
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    • pp.24-25
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    • 2010
  • 본 논문은 저전압 대전류의 신재생 에너지원을 고전압 저전류 계통에 연계하기 위하여 필요한 고압의 직류전압으로 변환하기 위하여 기존의 포워드 플라이백 컨버터의 출력단을 직렬로 연결한 새로운 방식의 컨버터를 제안한다. 제안된 컨버터는 절연의 장점을 가지고 있고 변압기 이용률이 높으며 효율이 우수한 장점을 가지고 있다. 제안된 회로의 동작원리를 설명하고 시뮬레이션으로 확인한 후 100[W]급 하드웨어 프로토 타입을 이용하여 검증하였다.

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The Feed-forward Controller and Notch Filter Design of Single-Phase Photovoltaic Power Conditioning System for Current Ripple Mitigation (단상 PVPCS 출력 전류의 리플 개선을 위한 노치 필터 및 피드 포워드 제어기 설계)

  • Kim, Seung-Min;Yang, Seung-Dae;Choi, Ju-Yeop;Choy, Ick;Lee, Young-Gwon
    • 한국태양에너지학회:학술대회논문집
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    • 2012.03a
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    • pp.325-330
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    • 2012
  • A single-phase PVPCS(photovoltaic power conditioning system) that contains a single phase dc-ac inverter tends to draw an ac ripple current at twice the out frequency. Such a ripple current may shorten passive elements life span and worsen output current THD. As a result, it may reduce the efficiency of the whole PVPCS system. In this paper, the ripple current propagation is analyzed, and two methods to reduce the ripple current are proposed. Firslyt, this paper presents notch filter with IP voltage controller to reject specific current ripple in single-phase PVPCS. The notch filter can be designed that suppress just only specific frequency component and no phase delay. The proposed notch filter can suppress output command signal in the ripple bandwidth for reducing output current THD. Secondly, for reducing specific current ripple, the other method is feed-forward compensation to incorporate a current control loop in the dc-dc converter. The proposed notch filter and feed-forward compensation method have been verified with computer simulation and simulation results obtained demonstrate the validity of the proposed control scheme.

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Design and Realization of a Digital PV Simulator with a Push-Pull Forward Circuit

  • Zhang, Jike;Wang, Shengtie;Wang, Zhihe;Tian, Lixin
    • Journal of Power Electronics
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    • v.14 no.3
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    • pp.444-457
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    • 2014
  • This paper presents the design and realization of a digital PV simulator with a Push-Pull Forward (PPF) circuit based on the principle of modular hardware and configurable software. A PPF circuit is chosen as the main circuit to restrain the magnetic biasing of the core for a DC-DC converter and to reduce the spike of the turn-off voltage across every switch. Control and I/O interface based on a personal computer (PC) and multifunction data acquisition card, can conveniently achieve the data acquisition and configuration of the control algorithm and interface due to the abundant software resources of computers. In addition, the control program developed in Matlab/Simulink can conveniently construct and adjust both the models and parameters. It can also run in real-time under the external mode of Simulink by loading the modules of the Real-Time Windows Target. The mathematic models of the Push-Pull Forward circuit and the digital PV simulator are established in this paper by the state-space averaging method. The pole-zero cancellation technique is employed and then its controller parameters are systematically designed based on the performance analysis of the root loci of the closed current loop with $k_i$ and $R_L$ as variables. A fuzzy PI controller based on the Takagi-Sugeno fuzzy model is applied to regulate the controller parameters self-adaptively according to the change of $R_L$ and the operating point of the PV simulator to match the controller parameters with $R_L$. The stationary and dynamic performances of the PV simulator are tested by experiments, and the experimental results show that the PV simulator has the merits of a wide effective working range, high steady-state accuracy and good dynamic performances.

Derivation of design equations for various incremental delta sigma analog to digital converters (다양한 증분형 아날로그 디지털 변환기의 설계 방정식 유도)

  • Jung, Youngho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.11
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    • pp.1619-1626
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    • 2021
  • Unlike traditional delta-sigma analog-to-digital converters, incremental analog-to-digital converters enable 1:1 mapping of input and output through a reset operation, which can be used very easily for multiplexing. Incremental analog-to-digital converters also allow for simpler digital filter designs compared to traditional delta-sigma converters. Therefore, starting with analysis in the time domain of the delayed integrator and non-delayed integrator, which are the basic blocks of analog-to-digital converter design, the design equations of a second-order input feed-forward, extended counting, 2+1 MASH (Multi-stAge-noise-SHaping), 2+2 MASH incremental analog-to-digital converter are derived in this paper. This allows not only prediction of the performance of the incremental analog-to-digital converter before design, but also the design of a digital filter suitable for each analog-to-digital converter. In addition, extended counting and MASH design techniques were proposed to improve the accuracy of analog-to-digital converters.