• Journal of KIISE:Computing Practices and Letters
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• v.14 no.4
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• pp.378-388
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• 2008

Flash memory has been attracting attention as the next mass storage media for mobile computing systems such as notebook computers and UMPC(Ultra Mobile PC)s due to its low power consumption, high shock and vibration resistance, and small size. A storage system with flash memory excels in random read, sequential read, and sequential write. However, it comes short in random write because of flash memory's physical inability to overwrite data, unless first erased. To overcome this shortcoming, we propose an SSD(Solid State Disk) architecture with two novel features. First, we utilize non-volatile FRAM(Ferroelectric RAM) in conjunction with NAND flash memory, and produce a synergy of FRAM's fast access speed and ability to overwrite, and NAND flash memory's low and affordable price. Second, the architecture categorizes host write requests into small random writes and large sequential writes, and processes them with two different buffer management, optimized for each type of write request. This scheme has been implemented into an SSD prototype and evaluated with a standard PC environment benchmark. The result reveals that our architecture outperforms conventional HDD and other commercial SSDs by more than three times in the throughput for random access workloads.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.14 no.1
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• pp.393-401
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• 2013

Most traditional databases exploit record-oriented storage model where the attributes of a record are placed contiguously in hard disk to achieve high performance writes. However, for search-mostly datawarehouse systems, column-oriented storage has become a proper model because of its superior read performance. Today, flash memory is largely recognized as the preferred storage media for high-speed database systems. In this paper, we introduce fast column-oriented database model and then propose a new column-aware index management scheme for the high-speed column-oriented datawarehouse system. Our index management scheme which is based on enhanced $B^+$-Tree achieves high search performance by embedded flash index and unused space compression in internal and leaf nodes. Based on the results of the performance evaluation, we conclude that our index management scheme outperforms the traditional scheme in the respect of the search throughput and response time.

• Journal of KIISE:Computing Practices and Letters
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• v.10 no.6
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• pp.448-459
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• 2004

Interoperability is an important requirement of portable storage devices that are used to exchange and share data among diverse hosts. However, the required interoperability cannot be provided if different host systems use different file systems. To address this problem, we propose a new type of storage device called FSOC(File System On a Chip) that contains the file system within the storage device. In this paper, we give an example of the design and implementation of a flash memory-based FSOC and propose the performance models of the conventional storage device and the FSOC. We also analyze the performance characteristics of the conventional storage device and the FSOC based on the proposed performance models, and provide several experimental results using real applications that validate the performance models.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.472-475
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• 2002

This paper presents a high speed ethernet communication and depulication method of communication to prevent decrease of reliability that was generated by high speed communication. Thus communication reliability was improved and this paper was considered that if any physical breakdown of line of communication occurred, other line of communication could operate collect. This paper used Flash memory for setting storage of backup data at Electric Car that have an humidity and a temperature and an impact. also improved reliability and besides matching data format to windows data format realized to confirm application program at PC or note book computer.

• Journal of Korea Multimedia Society
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• v.13 no.9
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• pp.1272-1284
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• 2010

As the mobile computers are becoming powerful and are used like general-purpose computers, operating systems for mobile computers also require swap system functionality that utilizes main memory efficiently. Flash memory is widely used as storage device for mobile computers but current linux swap system does not consider flash memory. Swap system is tightly related with process execution since it stores the contents of process in execution. By taking advantage of this characteristics, in this paper, we study a new linux swap system called PASS(Process-Aware Swap System), which allocates the different flash memory blocks to each process. Trace-driven experimental results show that PASS outperforms existing linux swap system with existing garbage collection schemes in terms of garbage collection cost.

• Journal of the Korea Society of Computer and Information
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• v.25 no.10
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• pp.1-14
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• 2020

In this paper, we propose to solve the problem of increasing system memory usage due to an increase in the number of mapping information management when using a NAND flash memory-based storage device in an existing sector-based file system. The proposed technique is to store only mapping information in page units based on index blocks and manage them in block units. To this end, the proposed technique uses a sequential offset for storing and managing a plurality of mapping information in one page in a small block, and a reverse offset for a spare page corresponding to a change in mapping information in the block. Through this, the proposed technique has the advantage that the number of block-unit deletions is less than that of the existing technique, and the system memory usage required for mapping information management is low. Reduced by about 32%.

• Journal of Internet of Things and Convergence
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• v.8 no.5
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• pp.33-39
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• 2022

A storage device used in the mobile computing field should have low power, light weight, durability, etc., and should be able to effectively store and manage large-capacity data generated by users. NAND flash memory is mainly used as a storage device in the field of mobile computing. Due to the structural characteristics of NAND flash memory, it is impossible to overwrite in place when a data update request is made, so it can be solved by accurately separating requests that frequently request data update and requests that do not, and storing and managing them in each block. The classification method for such a data update request is called a hot data identification method, and various studies have been conducted at present. This paper continuously records the occurrence of data update requests using a counting filter for more accurate hot data validation, and also verifies hot data by considering how often the requested update requests occur during a specific time.

• KIISE Transactions on Computing Practices
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• v.23 no.8
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• pp.473-480
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• 2017

In recent years, semiconductor-based storage devices such as flash memory (SSDs) have been developed to high performance. In addition, a trend has been observed of optimally utilizing resources such as the central processing unit (CPU) and memory of the internal controller in the storage device according to the needs of the application. This concept is called In-Storage Processing (ISP). In a storage device equipped with the ISP function, it is possible to process part of the operation executed on the host system, thus reducing the load on the host. Moreover, since the data is processed in the storage device, the data transferred to the host are reduced. In this paper, we propose a method to optimize graph query processing by utilizing these ISP functions, and show that the optimized graph processing method improves the performance of the graph 500 benchmark by up to 20%.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.331-331
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• 2012

With the NAND Flash scaling down, it becomes more and more difficult to follow Moore's law to continue the scaling due to physical limitations. Recently, three-dimensional (3D) flash memories have introduced as an ideal solution for ultra-high-density data storage. In 3D flash memory, as the process reason, we need to use poly-Si TFTs instead of conventional transistors. So, after combining charge trap flash (CTF) structure and poly-Si TFTs, the emerging device SONOS-TFTs has also suffered from some reliability problem such as hot carrier degradation, charge-trapping-induced parasitic capacitance and resistance which both create interface traps. Charge pumping method is a useful tool to investigate the degradation phenomenon related to interface trap creation. However, the curves for charge pumping current in SONOS TFTs were far from ideal, which previously due to the fabrication process or some unknown traps. It needs an optimization and the important geometrical effect should be eliminated. In spite of its importance, it is still not deeply studied. In our work, base-level sweep model was applied in SONOS TFTs, and the nonideal charge pumping current was optimized by adjusting the gate pulse transition time. As a result, after the optimizing, an improved charge pumping current curve is obtained.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.2
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• pp.77-88
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• 2009

According to the size of NAND flash memory as the storage system of mobile device becomes large, the performance of address translation and life cycle management in FTL (Flash Translation Layer) to interact with file system becomes very important. In this paper, we propose the continuity counters, which represent the number of continuous physical blocks whose logical addresses are consecutive, to reduce the number of address translation. Furthermore we propose the prefetching method which preloads frequently accessed pages into main memory to enhance I/O performance of flash memory. Besides, we use the 2-bit write prediction and asynchronous writing method to predict addresses repeatedly referenced from host and prevent from writing overhead. The experiments show that the proposed method improves the I/O performance and extends the life cycle of flash memory. As a result, proposed CFTL (Clustered Flash Translation Layer)'s performance of address translation is faster 20% than conventional FTLs. Furthermore, CFTL is reduced about 50% writing time than that of conventional FTLs.