• 제목/요약/키워드: etching solution.

검색결과 531건 처리시간 0.026초

실리콘 나노선/다중벽 탄소나노튜브 Core-Shell나노복합체의 합성 (Synthesis of Si Nanowire/Multiwalled Carbon Nanotube Core-Shell Nanocomposites)

  • 김성원;이현주;김준희;손창식;김동환
    • 한국재료학회지
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    • 제20권1호
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    • pp.25-30
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    • 2010
  • Si nanowire/multiwalled carbon nanotube nanocomposite arrays were synthesized. Vertically aligned Si nanowire arrays were fabricated by Ag nanodendrite-assisted wet chemical etching of n-type wafers using $HF/AgNO_3$ solution. The composite structure was synthesized by formation of a sheath of carbon multilayers on a Si nanowire template surface through a thermal CVD process under various conditions. The results of Raman spectroscopy, scanning electron microscopy, and high resolution transmission electron microcopy demonstrate that the obtained nanocomposite has a Si nanowire core/carbon nanotube shell structure. The remarkable feature of the proposed method is that the vertically aligned Si nanowire was encapsulated with a multiwalled carbon nanotube without metal catalysts, which is important for nanodevice fabrication. It can be expected that the introduction of Si nanowires into multiwalled carbon nanotubes may significantly alter their electronic and mechanical properties, and may even result in some unexpected material properties. The proposed method possesses great potential for fabricating other semiconductor/CNT nanocomposites.

ECR 플라즈마와 습식 식각으로 게이트 리세스한 AlGaAs/InGaAs/GaAs PHEMT 소자의 전기적 특성연구 (A Study of Electrical Properties for AlGaAs/InGaAs/GaAs PHEMT s Recessed by ECR Plasma and Wet Etching)

  • 이철욱;배인호;최현태;이진희;윤형섭;박병선;박철순
    • 한국전기전자재료학회논문지
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    • 제11권5호
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    • pp.365-370
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    • 1998
  • We studied a electrical properties in GaAs/AlGaAs/InGaAs pseudomorphic high electron mobility transistors(PHEMT s) recessed by electron cyclotron resonance(ECR) plasma and wet etching. Using the $NH_4OH$ solution, a nonvolatile AlF$_3$layer formed on AlGaAs surface after selective gate recess is effectively eliminated. Also, we controlled threshold voltage($V_th$) using $H_3PO_4$ etchant. We have fabricated a device with 540 mS/mm maximum transconductance and -0.2 V threshold voltage by using $NH_4OH$ and $H_3PO_4$dip after ECR gate recessing. In a 2-finger GaAs PHEMT with a gate length of 0.2$\mu m$ and width of 100 $\mu m$, a current gain of 15 dB at 10 GHz and a maximum cutoff frequency of 58.9 GHz have been obtained from the measurement of current gain as a function of frequency at 12mA $I_{dss}$ and 2 V souce-drain voltage.

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다공성 실리콘 반사방지막의 최적 반사율을 적용한 다결정 실리콘 태양전지 (Optimization of Porous Silicon Reflectance for Multicrystalline Silicon Solar Cells)

  • 권재홍;김동섭;이수홍
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.1
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    • pp.146-149
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    • 2004
  • Porous silicon(PS) as an excellent light diffuser can be used as an antireflection layer without other antireflection coating(ARC) materials. PS layers were obtained by electrochemical etching(ECE) anodization of silicon wafers in hydrofluoric acid/ethanol/de-ionized(DI) water solution($HF/EtOH/H_2O$). This technique is based on the selective removal of Si atoms from the sample surface forming a layer of PS with adjustable optical, electrical, and mechanical properties. A PS layer with optimal ARC characteristics was obtained in charge density (Q) of 5.2 $C/cm^2$. The weighted reflectance is reduced from 33 % to 4 % in the wavelength between 400 and 1000 nm. The weighted reflectance with optimized PS layers is much less than that obtained with a commercial SiNx ARC on a potassium hydroxide(KOH) pre-textured multi-crystalline silicon(mc-Si) surface.

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화학적기계적연마 공정으로 제조한 PZT 캐패시터의 공정 조건에 따른 강유전 특성 연구 (Ferroelectric characteristics of PZT capacitors fabricated by using chemical mechanical polishing process with change of process parameters)

  • 전영길;정판검;고필주;김남훈;이우선
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 추계학술대회 논문집
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    • pp.66-66
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    • 2007
  • Lead zirconate titanate (PZT) is one of the most attractive perovskite-type materials for ferroelectric random access memory (FRAM) due to its higher remanant polarization and the ability to withstand higher coercive fields. We first applied the damascene process using chemical mechanical polishing (CMP) to fabricate the PZT thin film capacitor to solve the problems of plasma etching including low etching profile and ion charging. The $0.8{\times}0.8\;{\mu}m$ square patterns of silicon dioxide on Pt/Ti/$SiO_2$/Si substrate were coated by sol-gel method with the precursor solution of PZT. Damascene process by CMP was performed to pattern the PZT thin film with the vertical sidewall and no plasma damage. The polarization-voltage (P-V) characteristics of PZT capacitors and the current-voltage characteristics (I-V) were examined by change of process parameters. To examine the CMP induced damage to PZT capacitor, the domain structure of the polished PZT thin film was also investigated by piezoresponse force microscopy (PFM).

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표면 거칠기와 분포 상태에 따른 Si-셀 효율에 관한 연구 (Study on the Efficiency of Si-cell Depending on the Texturing)

  • 오데레사
    • 한국진공학회지
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    • 제20권3호
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    • pp.189-194
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    • 2011
  • 실리콘 태양전지는 KOH 에칭 용액을 이용하여 texturing 시간을 다르게 하는 방법으로 표면의 texturing 상태를 다양하게 제작하였다. 그리고 $POCl_3$ 공정을 이용하여 n형 불순물을 도핑하여 pn접합을 만들었으며, 알루미늄 후면전극과 은 전면전극을 이용하여 Si-cell을 제작하였다. 피라미드 구조가 가장 크고 표면에 고르게 형성된 태양전지 셀에서 F.F. 계수가 높게 나타났으며, 효율도 높게 나타났다. texturing 형성이 잘 이루어진 셀인 경우 빛을 많이 흡수할 수 있고 회로 내부적으로는 직렬저항성분이 감소하여 단락전류성분이 현저히 증가하게 되어 최종적으로 효율이 증가되는 것을 확인하였다.

SiC 표면 거칠기에 미치는 습식식각의 영향 (The Effect of Surface Roughness on SiC by Wet Chemical Etching)

  • 김재관;조영제;한승철;이혜용;이지면
    • 대한금속재료학회지
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    • 제47권11호
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    • pp.748-753
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    • 2009
  • The surface morphology and the surface roughness of n-type SiC induced by wet-treatment using 45% KOH and buffered oxide etchant (BOE-1HF : $6H_2O$) were investigated by atomic force microscopy (AFM). While Si-face of SiC could be etched by alkali solutions such as KOH, acidic solutions such as BOE were hardly able to etch SiC. When the rough SiC samples were used, the surface roughness of etched sample was decreased after wet-treatment regardless of etchant, due to the planarization the of surface by widening of scratches formed by mechanical polishing. It was observed that the initial etching was affected by the energetically unstable sites, such as dangling bond and steps. However, when a relatively smooth sample was used, the surface roughness was rapidly increased after treatment at $180^{\circ}C$ for 1 hr and at room temperature for 4 hr by using KOH solution, resulting from the nano-sized structures such as pores and bumps. This indicates that porous SiC surface can be achieved by using purely chemical treatment.

중·대형 디스플레이용 건식 식각(ICP Dry etcher) 설비의 플라스마 균일도 제어 기술 (Plasma Uniformity Control Technology for Dry Etching (ICP Dry etcher) Equipment for Medium and Large Displays)

  • 홍성재;전홍구;양호식
    • 반도체디스플레이기술학회지
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    • 제21권3호
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    • pp.125-129
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    • 2022
  • The current display technology tends to be highly integrated with high resolution, the element size is gradually downsized, and the structure becomes complicated. Inductively coupled plasma (ICP) dry etcher of various types of etching equipment is a structure that places a large multi-divisional antenna source on the top lid, passes current to the Antenna, and generates plasma using the induced magnetic field generated at this time. However, in the case of a device of a large area size, a support that can withstand a load structurally is necessary, and when these support portions are applied, arrangement of antenna becomes difficult, which causes reduction in uniformity. As described above, the development of antenna source of a large area having a uniform plasma density on the whole surface is difficult to restrict hardware (H/W). As a solution to this problem, we confirmed the change in uniformity of plasma by applying two kinds of specific shape faraday shield(FICP) to the lower part of the large area upper lid antenna of 6 and 8th more than that generation size. In this thesis, we verify the faraday shield effect which can improve plasma uniformity control of ICP dry etcher equipment applied to medium and large displays.

용액 미립화공정 기반의 마이크로 스텐실 프린팅에 관한 연구 (A Study of Micro Stencil Printing based on Solution Atomization Process)

  • 당현우;김형찬;고정범;양영진;양봉수;최경현;도양회
    • 한국정밀공학회지
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    • 제31권6호
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    • pp.483-489
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    • 2014
  • In this study, experiments were conducted for micro pattern printing to combine solution atomization process and stencil printing based on electrospray deposition. The stencil mask fabricated by etching the photosensitive glass placed below 0.3 mm distance to substrate has 100 um line width. The process parameters of electrospray deposition system for the atomization of the solution are applied voltage and supply flow rate of the solution. Meniscus angle of cone-jet was optimized by varying the supply flow rate from 0.3 ml/hr to 0.7 ml/hr. Voltage condition was verified having symmetric cone-jet angle and no pulsation at 8.5 kV applied voltage. In addition, a number of micro patterns are printed using a single 1 step process by solution atomization process. Variable line width of approximate 100 um was confirmed by changing conditions of solution atomization regardless of the pattern size of stencil mask.

염화 제2철 농축 수용액으로부터의 액-액 추출에 의한 철과 니켈의 분리 (Separation of Iron and Nickel from Heavily Concentrated Aqueous Ferric Chloride Solution by Liquid-liquid Extraction)

  • 박무룡;김영욱;박재호;박진호
    • 청정기술
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    • 제13권4호
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    • pp.274-280
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    • 2007
  • 본 연구에서는 염화 제2철 수용액의 재생 공정에 주로 쓰이고 있는 철환원법을 대체하기 위한 방법으로, 액-액 용매 추출법을 사용하여 수용액 내에 잔존해 있는 중금속인 Fe와 Ni을 분리 회수하는 공정을 개발하였다. Lab 실험을 통해 우선 염화 제2철 수용액으로부터 선택적으로 염화 제2철만을 추출할 수 있는 용매조건을 개발하였고, 그 결과를 사용하여 액-액 추출공정의 상업화 추진을 위한 pilot 공정 및 장치를 개발하였다. 또한 pilot test를 통하여 추출단과 역추출단의 단수를 결정할 수 있었고, 양산 공정에 적용할 수 있는 공정 데이터를 확보하였다.

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습식텍스쳐를 이용한 다결정 실리콘 광학적.전기적 특성 연구 (A Study on the Optical and Electrical Characteristics of Multi-Silicon Using Wet Texture)

  • 한규민;유진수;유권종;이희덕;최성진;권준영;김기호;이준신
    • 한국태양에너지학회:학술대회논문집
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    • 한국태양에너지학회 2009년도 추계학술발표대회 논문집
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    • pp.383-387
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    • 2009
  • Multi-crystalline silicon surface etching without grain-boundary delineation is a challenging task for the fabrication of high efficiency solar cell. The use of sodium hydroxide - sodium hypochlorite (NaOH40% + NaOCl 12%) solution for texturing multi-crystalline silicon wafer surface in solar cell fabrication line is reported in this article. in light current-voltage results, the cells etched in NaOH 40% + NaOCl 12% = 1:2 exhibited higher short circuit current and open circuit voltage than those of the cells etched in NaOH 40% + NaOCl 12% = 1:1 solution. we have obtained 15.19% conversion efficiency in large area(156cm2) multi-Si solar cells etched in NaOH 40% + NaOCl 12% = 1:1 solution.

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