• 한국방송∙미디어공학회:학술대회논문집
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• 한국방송공학회 2009년도 IWAIT
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• pp.114-117
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• 2009

A new video inpainting algorithm is proposed for removing unwanted objects or error of sources from video data. In the first step, the block bundle is defined by the motion information of the video data to keep the temporal consistency. Next, the block bundles are arranged in the 3-dimensional graph that is constructed by the spatial and temporal correlation. Finally, we pose the inpainting problem in the form of a discrete global optimization and minimize the objective function to find the best temporal bundles for the grid points. Extensive simulation results demonstrate that the proposed algorithm yields visually pleasing video inpainting results even in a dynamic scene.

• ETRI Journal
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• 제43권4호
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• pp.728-745
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• 2021

Carbon nanotube field-effect transistors (CNTFETs) have been widely studied as a promising technology to be included in post-complementary metal-oxide-semiconductor integrated circuits. Despite significant advantages in terms of delay and power dissipation, the fabrication process for CNTFETs is plagued by fault occurrences. Therefore, developing a fast and accurate method for estimating the reliability of CNTFET-based digital circuits was the main goal of this study. In the proposed method, effects related to faults that occur in a gate's transistors are first represented as a probability transfer matrix. Next, the target circuit's graph is traversed in topological order and the reliabilities of the circuit's gates are computed. The accuracy of this method (less than 3% reliability estimation error) was verified through various simulations on the ISCAS 85 benchmark circuits. The proposed method outperforms previous methods in terms of both accuracy and computational complexity.

• 센서학회지
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• 제9권4호
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• pp.268-273
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• 2000

본 논문은 박막 히터형 유량센서의 온도보상을 위해 초기 불평형 전압을 이용한 새로운 온도보상 방법을 사용하였다. 온도보상을 위해서 본 논문에서는 휘스튼 브릿지의 비를 다르게 하는 방법으로 오픈루프에서 초기 불평형 전압을 온도에 따라 나타낸 그래프를 이용하여 센서 회로의 저항값을 구하는 방법을 사용하였다. 공기 온도가 $-20^{\circ}C{\sim}120^{\circ}C$ 범위에서 온도 보상을 실시한 결과 ${\pm}1%$이내의 온도 오차가 발생하여, 정밀한 박막 히터형 유량 센서를 제작할 수 있었다.

• 물과 미래
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• 제12권2호
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• pp.56-62
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• 1979

강우자료로부터 설계 홍수량을 추정하는 많은 방법들은 설계강우량의 지속기간 결정에 매우 복잡한 시행 착오법을 사용하고 있으나, 본 연구에서는 순간단위유량도 이론을 적용한 해석적 방법에 의하여 근사 지속기간을 결정하는 방법을 이론적으로 전개하였다. 이렇게 유도된 방법을 무심천 대표유역에 적용하여 교점유량비곡선(hydrograph curve)과 재현기간별로 설계강우곡선(rainfall curve)을 계산하고, 그 결과를 동일 좌표상에 그려 그 교점이 표시하는 유효우량 지속기간을 결정하였다.

• 대한전기학회논문지
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• 제38권8호
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• pp.658-666
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• 1989

In this paper, an efficient algorithm for estimation volume and surface area and a reconstruction algorithm for 3-dimensional graphics are presented.In order to improve computing efficiency, the graph theory is utilized and the algorithm to obtain proper contour points is developed by considering several tolerances. Search for the contour points is limited by the change of curvature of cross sectional contour to provide efficiency in searching the minimum cost path. In computer simulation of these algorithms, the results show that, for the tolerance values of 1.001 and 1.002, the execution time reduced to 66%-80% and the error for the measured value is less than 3%. The reconstructed 3-dimensional images from the cross sections can be analyzed in many directions using the graphic scheme.

• 제어로봇시스템학회논문지
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• 제11권5호
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• pp.457-462
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• 2005

An empirical way of a covariance matrix which expresses the odometry uncertainty of mobile robots is proposed. This method utilizes PC-method which removes systematic errors of odometry. Once the systematic errors are removed, the odometry error can be modeled using the Gaussian probability distribution, and the parameters of the distribution can be represented by the covariance matrix. Experimental results show that the method yields $5{\%}$ and $2.3{\%}$ offset for the synchro and differential drive robots.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2005년도 ICCAS
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• pp.1482-1485
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• 2005

An equivalent schema matching among several different source schemas is very important for information integration or mining on the XML based World Wide Web. Finding most similar source schema corresponding mediated schema is a major bottleneck because of the arbitrary nesting property and hierarchical structures of XML DTD schemas. It is complex and both very labor intensive and error prune job. In this paper, we present the first complex matching of XML schema, i.e. XML DTD, inlining two dimensional DTD graph into flat feature values. The proposed method captures not only schematic information but also integrity constraints information of DTD to match different structured DTD. We show the integrity constraints based hierarchical schema matching is more semantic than the schema matching only to use schematic information and stored data.

• 한국정보처리학회:학술대회논문집
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• 한국정보처리학회 2011년도 추계학술발표대회
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• pp.1166-1169
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• 2011

In this paper, we design a Circle dot Code, In our scheme, we design a dot patterns for increasing maximum capacity and also for increasing robustness to Affine Transformation. Our code Can be extended according number of data circle. We use three data circle vision code. In this type code, after acquiring camera images for the Circle dot Codes, and perform error correction decoding using four position symbols and six CRC symbols. We perform graph based dot code analysis which determines the topological distance between dot pixels. Our code can be bridged the real world and ubiquitous computing environment.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.815-818
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• 1998

Hardware formal verification involves the use of analytical techniques to prove that the implementation of a system confroms to the specification. The specification could be a set of properties that the system must have or it could be an alternative representation of the system behavior. We can represent our behavioral specification to be written in VHDL coding. In this paper, we proposed a new hardware design verification method. For theis method, we assumed that a verification pattern already exists and try to make an algorithm to find a place where a design error occurred. This method uses an hierarchical approach by making control flow graph(CFG) hierarchically. From the simulation, this method was turned out to be very effective that all the assumed design errors could be detected.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2009년도 정보 및 제어 심포지움 논문집
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• pp.313-315
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• 2009

In this thesis, A methodology of system implement for PID controller, PWM logic, HSC logic, Host Communication and external DAC interface are implemented into single FPGA chip is proposed. The implemented system is used to control the speed of DC servo motor. A DATA block transfers set point value(SV) and P, I, D gain parameters to the corresponding Blocks respectively by the Host Communication to Computer. A HSC block generates process value(PV) by a pulse and $90^{\circ}$ shifted pulse from the encoder A PID block makes error(E) signal from the set value and process value and output manufacture value(MV) through the PID controller. In PWM block using the MV from the PID block, drives H-bridge controlling the Motor. Also DAC interface controls the DAC to graph the digital signal such as SV, PV, E, MV in FPGA onto the Oscilloscope.