• KSII Transactions on Internet and Information Systems (TIIS)
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• 제4권6호
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• pp.1116-1132
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• 2010

In this paper, a new forward error correction (FEC) protocol is proposed for point-to-multipoint satellite links. Link-layer error control protocols in point-to-multipoint satellite links impose several problems such as unreliability and receiver-heterogeneity. To resolve the problem of heterogeneous error rates at different receivers, the proposed scheme exploits multiple multicast channels to which each receiver tunes. The more channels a receiver tunes to, the more powerful error correcting capability it achieves. Based on its own channel condition, each receiver tunes to as many channels as it needs, which prevents from receiving unwanted parities. Furthermore, each receiver saves the decoding time, processing overhead, and processing energy. Performance evaluation shows that the proposed scheme guarantees the target PER while saving energy. The proposed technique is highly adaptive to the channel variation with respect to the throughput efficiency, and provides scalable PER and throughput efficiency.

• 전자공학회논문지A
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• 제30A권11호
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• pp.21-28
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• 1993

Decoding algorithm of noncyclic Reed-Solomon codes consists of four steps which are to compute syndromes, to find error-location polynomial, to decide error-location, and to solve error-values. There is a decoding method by which the computation of both error-location polynomial and error-evaluator polynimial can be avoided in conventional decoding methods using Euclid algorithm. The disadvantage of this method is that the same amount of computation is needed that is equivalent to solve the avoided polynomial. This paper considers the division method on polynomial on GF(2$^{m}$) systematically. And proposes a novel method to find error correcting polynomial by simple mathematical expression without the same amount of computation to find the two avoided polynomial. Especially. proposes the method which the amount of computation to find F (x) from the division M(x) by x, (x-1),....(x--${\alpha}^{n-2}$) respectively can be avoided. By applying the simple expression to decoding procedure on RS codes, propses a new decoding algorithm, and to show the validity of presented method, computer simulation is performed.

• 대한수학회보
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• 제38권4호
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• pp.797-801
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• 2001

The purpose of this paper is to give an upper bound for A[n,4], the maximum number of codewords in a binary code of word length n with minimum distance 4 between codewords. We have improved upper bound for A[12k+11,4]. In this correspondence we prove $A[23,4]\leq173716$.

• 정보와 통신
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• 제32권6호
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• pp.23-29
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• 2015

오류 정정 부호(error-correcting code)를 사용하는 McEliece 암호 체계는 양자 컴퓨터에서도 안전한 공개키 암호기법으로서 주목 받아왔다. 본고에서는 McEliece 암호 체계에 사용되는 오류 정정 부호와 그 조건, 암호 체계의 구조와 그 발전 과정 및 응용을 알아보고, 안전성 분석에 대해 소개한다.

• 전자공학회논문지
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• 제49권11호
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• pp.3-8
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• 2012

2차원 곱 부호는 저장장치 시스템에서 연집 오류를 정정하기 위해 연구되었다. RS-LDPC 곱 부호는 횡 방향의 RS 부호와 종 방향의 LDPC 부호로 이루어져 있다. 먼저 횡 방향의 RS 부호를 이용하여 연집 오류를 검출하며, 이 연집 오류의 위치 정보를 활용하여 종 방향의 LDPC 부호로 오류를 정정한다. 저장장치에서는 여러 가지 요인에 의해 연집 오류가 발생할 수 있다. 따라서 저장장치 시스템에서는 연집 오류에 강한 부호가 필요하다. RS-LDPC 곱 부호는 연집 오류에 강하다. 하지만 저장 밀도가 커지면서 연집 오류의 길이는 더 길어지게 된다. 따라서 본 논문에서는 긴 연집 오류에도 강한 특성을 보이는 LDPC-LDPC 곱 부호를 제안한다. 또한, RS-LDPC 곱 부호와 비교하여 LDPC-LDPC 곱 부호는 횡 방향으로 LDPC 부호를 사용하여 많은 램덤 오류가 발생 하였을 때 안정적인 성능 이득이 있다.

• 제어로봇시스템학회논문지
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• 제17권11호
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• pp.1101-1105
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• 2011

Radiation particles can introduce temporary errors in memory systems. To protect against these errors, so-called soft errors, error detection and correcting codes are used. In addition, scrubbing is applied which is a fundamental technique to avoid the accumulation of soft errors. This paper introduces an optimal scrubbing scheme, which is suitable for a system with auto error detection and correction logic. An auto error detection and correction logic can correct soft errors without CPU's writing operation. The proposed scrubbing scheme leads to maximum reliability by considering both allowable scrubbing load and the periodic accesses to memory by the tasks running in the system.

• 대한수학회보
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• 제52권3호
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• pp.809-823
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• 2015

This paper is devoted to presenting a MacWilliams type identity for m-spotty RT weight enumerators of byte error control codes over finite commutative Frobenius rings, which can be used to determine the error-detecting and error-correcting capabilities of a code. This provides the relation between the m-spotty RT weight enumerator of the code and that of the dual code. We conclude the paper by giving three illustrations of the results.

• 소성∙가공
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• 제16권1호
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• pp.15-19
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• 2007

This paper presents an integrated machining error compensation method based on captured images of tool deflection shapes in flat end-milling processes. This approach allows us to avoid modeling machining characteristics (cutting forces, tool deflections and machining errors etc.) and accumulating calculation errors induced by several simulations. For this, a high-speed camera captured images of real deformed tool shapes which were cutting under given machining conditions. Using image processes and a machining error model, it is possible to estimate tool deflection in cutting conditions modeled and to compensate for machining errors using an iterative algorithm correcting tool paths. This corrected tool path can effectively reduce machining errors in the flat end-milling process. Experiments are carried out to validate the approaches proposed in this paper. The proposed error compensation method can be effectively implemented in a real machining situation, producing much smaller errors.

• 한국통신학회논문지
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• 제37C권11호
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• pp.1054-1063
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• 2012

본 논문에서는 다계층 브로드캐스트 통신 환경에서 주목받는 비균등 오류정정기법(UEP)에 대하여 기본 이론을 설명하고 그 효과와 응용 분야를 소개한다. 또한 현재까지의 UEP 기술의 연구 동향을 표준 적용 현황과 관련 논문의 소개를 통해 조명하고, 이를 통해 표준화 전망을 비롯한 앞으로의 활용 방안을 제시한다.

• 대한전자공학회논문지
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• 제25권2호
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• pp.204-210
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• 1988

The residue number system offers the possibility of high-speed operation and error detection/correction because of the separability of arithmetic operations on each digit. A compact residue arithmetic module named the self-checking pulse-train residue arithmetic circuit is effectively employed as the basic module, and an efficient error detection/correction algorithm in which error detection is performed in each basic module and error correction is performed based on the parallelism of residue arithmetic is also employed. In this case, the error correcting circuit is imposed in series to non-redundant system. This design method has an advantage of compact hardware. Following the proposed method, a 2nd-order recursive fault-tolerant digital filter is practically implemented, and its fault-tolerant ability is proved by noise injection testing.