• Title/Summary/Keyword: envelope detector

Search Result 30, Processing Time 0.026 seconds

A Design of Non-Coherent CMOS IR-UWB Receiver (비동기식 CMOS IR-UWB 수신기의 설계 및 제작)

  • Ha, Min-Cheol;Park, Young-Jin;Eo, Yun-Seong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.19 no.9
    • /
    • pp.1045-1050
    • /
    • 2008
  • In this paper presents a CMOS RF receiver for IR-UWB wireless communications is presented. The impulse radio based UWB receiver adopts the non-coherent demodulation that simplifies the receiver architecture and reduces power consumption. The IR-UWB receiver consists of LNA, envelop detector, VGA, and comparator and the receiver including envelope detector, VGA, and comparator is fabricated on a single chip using $0.18{\mu}m$ CMOS technology. The measured sensitivity of IR-UWB receiver is down to -70 dBm and the BER $10^{-3}$, respectively at data rate 1 Mbps. The current consumption of IR-UWB receiver except external LNA is 5 mA at 1.8 V.

Research of PAE and linearity of Power amplifier Using EER and Metamaterial (EER 및 메타구조를 이용한 전력증폭기의 선형성 및 효율 개선)

  • Jung, Du-Won;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.47 no.2
    • /
    • pp.80-85
    • /
    • 2010
  • In this paper, the efficiency of power amplifier has been maximized by the application of EER structure, and the linearity has been improved by using metamaterial structure. This paper has proposed a design of power amplifier in class-F to get the PAE, and to control dynamic power using envelope detector. CRLH structure gets high-linearity by removing harmonics arisen from the mismatching of matching circuit. The PAE and the 3rd order IMD have been improved 5.93 %, 12.83 dB compared with those of conventional Class-F amplifier, respectively.

Research on PAE and Linearity of Power Amplifier Using EER and PBG Structure (EER 및 PBG를 이용한 전력 증폭기의 효율 및 선형성 개선에 관한 연구)

  • Lee, Chong-Min;Seo, Chul-Hun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.18 no.6 s.121
    • /
    • pp.584-590
    • /
    • 2007
  • In this paper, the efficiency of power amplifier has been maximized by the application of EER structure, and the linearity has been improved by using PBG structure. This paper has proposed a design of power amplifier in class-F to get the PAE, and to control dynamic power using envelope detector. PBG structure gets high-linearity by removing harmonics arisen from the mismatching of matching circuit. The PAE and the 3rd order IMD have been improved 34.64%, 6.65 dB compared with those of conventional Doherty amplifier, respectively.

Nonbinary Convolutional Codes and Modified M-FSK Detectors for Power-Line Communications Channel

  • Ouahada, Khmaies
    • Journal of Communications and Networks
    • /
    • v.16 no.3
    • /
    • pp.270-279
    • /
    • 2014
  • The Viterbi decoding algorithm, which provides maximum - likelihood decoding, is currently considered the most widely used technique for the decoding of codes having a state description, including the class of linear error-correcting convolutional codes. Two classes of nonbinary convolutional codes are presented. Distance preserving mapping convolutional codes and M-ary convolutional codes are designed, respectively, from the distance-preserving mappings technique and the implementation of the conventional convolutional codes in Galois fields of order higher than two. We also investigated the performance of these codes when combined with a multiple frequency-shift keying (M-FSK) modulation scheme to correct narrowband interference (NBI) in power-line communications channel. Themodification of certain detectors of the M-FSK demodulator to refine the selection and the detection at the decoder is also presented. M-FSK detectors used in our simulations are discussed, and their chosen values are justified. Interesting and promising obtained results have shown a very strong link between the designed codes and the selected detector for M-FSK modulation. An important improvement in gain for certain values of the modified detectors was also observed. The paper also shows that the newly designed codes outperform the conventional convolutional codes in a NBI environment.

Threshold level analysis of the FFH-MA system using noncoherent FSK modulation under the presence of frequency and timing offsets (주파수와 타이밍 옵셋에 의한 빠른 주파수 호핑 시스템의 임계값 분석)

  • Jeungmin Joo;Yeomin Yoon;Miheung Choe;Lee, Kwangeog;Kim, Kiseon
    • Proceedings of the IEEK Conference
    • /
    • 2003.07a
    • /
    • pp.226-229
    • /
    • 2003
  • Under the prsence of the frequency and timing offset, we evaluate the BER performance of the FFH-MA system using noncoherent M-ary FSK modulation in the Rayleigh fading channel. The numerical resuts show that while the frequency and timing offset increases at a given SNR, the BER is severely degraded. The threshold level used in the envelope detector increases with the increase of the frequency and timing offset, and with the proper selection of the threshold level, the BER can be improved under the presence of such offsets.

  • PDF

A 3-5 GHz Non-Coherent IR-UWB Receiver

  • Ha, Min-Cheol;Park, Young-Jin;Eo, Yun-Seong
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.8 no.4
    • /
    • pp.277-282
    • /
    • 2008
  • A fully integrated inductorless CMOS impulse radio ultra-wideband (IR-UWB) receiver is implemented using $0.18\;{\mu}m$ CMOS technology for 3-5 GHz application. The UWB receiver adopts the non-coherent architecture, which removes the complexity of RF architecture and reduces power consumption. The receiver consists of inductorless differential three stage LNA, envelope detector, variable gain amplifier (VGA), and comparator. The measured sensitivity is -70 dBm in the condition of 5 Mbps and BER of $10^{-3}$. The receiver chip size is only $1.8\;mm\;{\times}\;0.9\;mm$. The consumed current is 15 mA with 1.8 V supply.

Design and Fabrication of a W-band FMCW Radar for the Metal Target Detection Under the Ground Clutter Environment (지면 클러터 환경에서 금속표적감지를 위한 W-대역 FMCW 레이더의 설계 및 제작)

  • Park Jung-Dong
    • Journal of the Korea Institute of Military Science and Technology
    • /
    • v.7 no.3 s.18
    • /
    • pp.93-100
    • /
    • 2004
  • In this paper, we describe the design, fabrication, and test results of a W-band FMCW radar for the metal target detection under the ground clutter environment. In order to detect metal targets on the ground, we used a single cassegrain antenna with the beamwidth of $1.45^{\circ}$ which forms pencil-beam footprint on the ground. A log envelope detector was applied to improve radar performance in the severe ground clutter known as Weibull and log normal clutter. The designed FMCW radar can acquire altitude information from the ground clutter with $\sigma_0=-23dB$ at the height of 160m. The fabricated W-band FMCW radar transmits 11 dBm power and the dynamic range of the receiver is from -106dBm to -30dBm. The performances of the fabricated sensors were tested out in the fields and detected a car target of 200m apart on the grass.

Design and Simulation for the Filter of RFID System Operated at 13.56MHz (13.56MHz RF시스템에서의 필터 설계 및 시뮬레이션)

  • Ryu, Hyoung-Sun;Jin, In-Su;Yang, Gyung-Rock;Song, Seung-Ho;Kim, Yang-Mo
    • Proceedings of the KIEE Conference
    • /
    • 2000.07d
    • /
    • pp.3145-3147
    • /
    • 2000
  • A passive RFID system consists of reader and tag. Reader is required the filter to modulate the data from backscattering signal which is transmitted by tag. The filter in the reader consists of envelope detector, amplifier, filter, and pulse shaping circuit, In this paper, design and analysis of filter in the RFID system which is operated at l3.56MHz carrier and 70KHz backscattering signal frequency is presented and is confirmed by simulation using Pspice.

  • PDF

A Design of Transceiver for 13.56MHz RFID Reader using the Peak Detector with Automatic Reference Voltage Generator (자동 기준전압 생성 피크 검출기를 이용한 13.56 MHz RFID 리더기용 송수신기 설계)

  • Kim, Ju-Seong;Min, Kyung-Jik;Nam, Chul;Hurh, Djyoung;Lee, Kang-Yun
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.47 no.3
    • /
    • pp.28-34
    • /
    • 2010
  • In this paper, the transceiver for RFID reader using 13.56MHz as a carrier frequency and meeting International Standard ISO 14443 type A, 14443 type B and 15693 is presented. The receiver is composed of envelope detector, VGA(Variable Gain Amplifier), filter, comparator to recovery the received signal. The proposed automatic reference voltage generator, positive peak detector, negative peak detector, and data slicer circuit can adjust the decision level of reference voltage over the received signal amplitudes. The transmitter is designed to drive high voltage and current to meet the 15693 specification. By using inductor loading circuit which can swing more than power supply and drive large current even under low impedance condition, it can control modulation rate from 30 percent to 5 percent, 100 perccnt and drive the output currents from 5 mA to 240 mA depending on standards. The 13.56 MHZ RFID reader is implemented in $0.18\;{\mu}m$ CM08 technology at 3.3V single supply. The chip area excluding pads is $1.5mm\;{\times}\;1.5mm$.

A Low Power Single-End IR-UWB CMOS Receiver for 3~5 GHz Band Application (3~5 GHz 광대역 저전력 Single-Ended IR-UWB CMOS 수신기)

  • Ha, Min-Cheol;Park, Byung-Jun;Park, Young-Jin;Eo, Yun-Seong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.20 no.7
    • /
    • pp.657-663
    • /
    • 2009
  • A fully integrated single ended IR-UWB receiver is implemented using 0.18 ${\mu}m$ CMOS technology. The UWB receiver adopts the non-coherent architecture, which simplifies the RF architecture and reduces power consumption. The receiver consists of single-ended 2-stage LNAs, S2D, envelope detector, VGA, and comparator. The measured results show that sensitivity is -80.8 dBm at 1 Mbps and BER of $10^{-3}$. The receiver uses no external balun and the chip size is only $1.8{\times}0.9$ mm. The consumed current is very low with 13 mA at 1.8 V supply and the energy per bit performance is 23.4 nJ/bit.