• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.480.1-480.1
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• 2014

In this study, we suggest the new emitter formation applied solid phase epitaxy (SPE) growth process using rapid thermal process (RTP). Preferentially, we describe the SPE growth of intrinsic a-Si thin film through RTP heat treatment by radio-frequency plasma-enhanced chemical vapor deposition (RF-PECVD). Phase transition of intrinsic a-Si thin films were taken place under $600^{\circ}C$ for 5 min annealing condition measured by spectroscopic ellipsometer (SE) applied to effective medium approximation (EMA). We confirmed the SPE growth using high resolution transmission electron microscope (HR-TEM) analysis. Similarly, phase transition of P doped a-Si thin films were arisen $700^{\circ}C$ for 1 min, however, crystallinity is lower than intrinsic a-Si thin films. It is referable to the interference of the dopant. Based on this, we fabricated 16.7% solar cell to apply emitter layer formed SPE growth of P doped a-Si thin films using RTP. We considered that is a relative short process time compare to make the phosphorus emitter such as diffusion using furnace. Also, it is causing process simplification that can be omitted phosphorus silicate glass (PSG) removal and edge isolation process.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.2
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• pp.93-101
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• 2002

We have proposed and fabricated two lateral type field emission diodes, poly-Si emitter by utilizing the local oxidation of silicon (LOCOS) and GaN emitter using metal organic chemical vapor deposition (MOCVD) process. The fabricated poly-Si diode exhibited excellent electrical characteristics such as a very low turn-on voltage of 2 V and a high emission current of $300{\;}\bu\textrm{A}/tip$ at the anode-to-cathode voltage of 25 V. These superior field emission characteristics was speculated as a result of strong surface modification inducing a quasi-negative electron affinity and the increase of emitting sites due to local sharp protrusions by an appropriate activation treatment. In respect, two kinds of procedures were proposed for the fabrication of the lateral type GaN emitter: a selective etching method with electron cyclotron resonance-reactive ion etching (ECR-RIE) or a simple selective growth by utilizing $Si_3N_4$ film as a masking layer. The fabricated device using the ECR-RIE exhibited electrical characteristics such as a turn-on voltage of 35 V for $7\bu\textrm{m}$ gap and an emission current of~580 nA/l0tips at anode-to-cathode voltage of 100 V. These new field emission characteristics of GaN tips are believed to be due to a low electron affinity as well as the shorter inter-electrode distance. Compared to lateral type GaN field emission diode using ECR-RIE, re-grown GaN emitters shows sharper shape tips and shorter inter-electrode distance.

• Korean Journal of Optics and Photonics
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• v.31 no.1
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• pp.37-44
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• 2020

In this study, we propose a design method to optimize the electro-optical efficiency of a planar solar cell structure by adjusting one-dimensionally periodic emitter electrodes. Since the aperture ratio of the active layer decreases as the period of the emitter electrode decreases, the amount of light absorption diminishes, affecting the performance of the device. Here we design the optimal structure of the periodic emitter electrode in a simple planar solar cell, by simulation. In terms of optics, we find the condition that shows optical performance similar to that of a reference without the emitter electrode. In addition, the optimized electrode structure is extracted considering both the optical and electrical efficiency. This work will help to increase the utilization of solar cells by suggesting a structure that can most efficiently transfer charge generated by photoelectric conversion to the electrodes.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.347.1-347.1
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• 2016

Screen printing is commonly used to form the electrode for crystalline silicon solar cells. However, it has caused high resistance and low aspect ratio, resulting in decrease of conversion efficiency. Accordingly, Ni/Cu/Ag plating method could be applied for crystalline silicon solar cells to reduce contact resistance. For Ni/Cu/Ag plating, laser ablation process is required to remove anti-reflection layers prior to the plating process, but laser ablation results in surface damage and then decrease of open-circuit voltage and cell efficiency. Another issue with plating process is ghost plating. Ghost plating occurred in the non-metallized region, resulting from pin-hole in anti-reflection layer. In this paper, we investigated the effect of Ni/Cu/Ag plating on the electrical properties, compared to screen printing method. In addition, phosphoric acid layer was spin-coated prior to laser ablation to minimize emitter damage by the laser. Phosphorous elements in phosphoric acid generated selective emitter throughout emitter layer during laser process. Then, KOH treatment was applied to remove surface damage by laser. At this step, amorphous silicon formed by laser ablation was recrystallized during firing process and remaining of amorphous silicon was removed by KOH treatment. As a result, electrical properties as Jsc, FF and efficiency were improved, but Voc was lower than screen printed solar cells because Voc was decreased due to surface damage by laser process. Accordingly, we expect that efficiency of solar cells could be improved by optimization of the process to remove surface damage.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.3
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• pp.66-74
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• 1999

InAlGaAs/InGaAs HBTs with the various emitter junction gradings(xf=0.0-1.0) and the modified collector structures (collector- I;n-p-n, collector-II;i-p-n) are simulated and analyzed by HMC (Hybrid Monte Carlo) method in order to find an optimum structure for the shortest transit time. A minimum base transit time($ au$b) of 0.21ps was obtainsed for HBT with the grading layer, which is parabolically graded from $x_f$=1.0 and xf=0.5 at the emitter-base interface. The minimum collector transit time($\tau$c) of 0.31ps was found when the collector was modified by inserting p-p-n layers, because p layer makes it possible to relax the electric field in the i-type collector layer, confining the electrons in the $\Gamma$-valley during transporting across the collector. Thus InAlGaAs/InGaAs HBT in combination with the emitter grading($x_f$=0.5) and the modified collector-III showed the transit times of 0.87 psec and the cut-off frequency (f$\tau$) of 183 GHz.

• Journal of Information Display
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• v.3 no.1
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• pp.1-5
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• 2002

A series of fully conjugated polymers containing new arylenevinylene units were synthesized and their light-emitting properties were investigated. A bisphosphonate containing tetraphenyl group was made to react with three different dialdehyde monomers to produce fully conjugated alternating copolymers. The photoluminescence (PL) and the electroluminescence (EL) peak wavelengths of the polymers were varied from 500 nm to 460 nm depending on the polymer structure. Single layer EL devices using the polymers as an emissive layer have been fabricated. The single layer EL devices became visible between 12-22 V and emitted blue light.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.05a
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• pp.415-419
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• 1999

Many bipolar logic circuit of conventional occurred problem of speed delay according to deep saturation state of vertical NPN Transistor. In order to remove minority carries of the base region at changing signal in conventional bipolar logic circuit, we made transistor which is composed of NPN transistor shortened buried layer under the Base region, PNP transistor which is merged in base, epi layer and substrate. Also the Ring-Oscillator for measuring transmission time-delay per gate was designed as well. The structure of Gate consists of the vertical NPN Transistor, substrate and Merged PNP Transistor. In the result, we fount that tarriers which are coming into intrinsic Base from Emitter and the portion of edge are relatively a lot, so those make Base currents a lot and Gain is low with a few of collector currents because of cutting the buried layer of collector of conventional junction area. Merged PNP Transistor's currents are low because Base width is wide and the difference of Emitter's density and Base's density is small. we get amplitude of logic voltage of 200mv, the minimum of transmission delay-time of 211nS, and the minimum of transmission delay-time per gate of 7.26nS in AC characteristic output of Ring-Oscillator connected Gate.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.6
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• pp.370-375
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• 2016

In this paper, we investigated the electrical properties of crystalline silicon solar cell fabricated with Ni/Cu/Ag plating. The laser process was used to ablate silicon nitride layer as well as to form the selective emitter. Phosphoric acid layer was spin-coated to prevent damage caused by laser and formed selective emitter during laser process. As a result, the contact resistance was decreased by lower sheet resistance in electrode region. Low sheet resistance was obtained by increasing laser current, but efficiency and open circuit voltage were decreased by damage on the wafer surface. KOH treatment was used to remove the laser damage on the silicon surface prior to metalization of the front electrode by Ni/Cu/Ag plating. Ni and Cu were plated for each 4 minutes and 16 minutes and very thin layer of Ag with $1{\mu}m$ thickness was plated onto Ni/Cu electrode for 30 seconds to prevent oxidation of the electrode. The silicon solar cells with KOH treatment showed the 0.2% improved efficiency compared to those without treatment.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.11a
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• pp.553-556
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• 1999

This paper presents a proper condition to achieve above 19 % conversion efficiency using PC1D simulator. Cast poly-Si wafers with resistivity of 1 $\Omega$-cm and thickness of 250 ${\mu}{\textrm}{m}$ were used as a starting material. Various efficiency influencing parameters such as rear surface recombination velocity and minority carrier diffusion length in the base region, front surface recombination velocity, junction depth and doping concentration in the Emitter layer, BSF thickness and doping concentration were investigated. Optimized cell parameters were given as rear surface recombination of 1000 cm/s, minority carrier diffusion length in the base region 200 ${\mu}{\textrm}{m}$, front surface recombination velocity 100 cnt/s, sheet resistivity of emitter layer 100 $\Omega$/$\square$, BSF thickness 5 ${\mu}{\textrm}{m}$, doping concentration 5$\times$10$^{19}$ cm$^3$ . Among the investigated variables, we learn that a diffusion length of base layer acts as a key factor to achieve conversion efficiency higher than 19 %. Further details of simulation parameters and their effects to cell characteristics are discussed in this paper.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.12
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• pp.39-46
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• 1996

In AlGaAs/GaAs HBT the temperature dependence of DC parameters was investigated over the temperature range between 95K and 580K. The temperature dependence of DC parameters depends on the relative contribution of each of the current components suc as emitter-injection-current, base-injection-current, bulk recombination current, interface recombination curretn, thermal generation ecurrent and avalanche current due to impact ionization within the collector space charge layer in a specific temperature. In this paper we investigated the temperature effects on DC parameters such as V$_{BE,ON}$ current gain, input and output characteristics, V$_{CE, OFF}$, R$_{E}$, R$_{C}$ and analyzed the origins, and extracted the qualitativ econditions for a stable HBTs against the temperature variation. Finally, in order to keep HBTs stable with respect to the variation of temperature, the valance-band-energy-discontinuity at emitter-base heterojunction should be large enough to enhance the effect of carrier suppression at a relatively high temperature. In addition the recombination centers, especially around collector junction, should be removed and the area of emitter and collector junction should be identical as well.