• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.2395-2397
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• 2005

A low voltage operated piezoelectric RF MEMS in-line switch has been realized by using silicon bulk micromachining technologies for advanced mobile/wireless applications. The developed RF MEMS in-line switches were comprised of four piezoelectric cantilever actuators with an Au contact metal electrode and a suspended Au signal transmission line above the silicon substrate. The measured operation dc bias voltages were ranged from 2.5 to 4 volts by varying the thickness and the length of the piezoelectric cantilever actuators, which are well agreed with the simulation results. The measured isolation and insertion loss of the switch with series configuration were -43dB and -0.21dB (including parasitic effects of the silicon substrate) at a frequency of 2GHz and an actuation voltage of 3 volts.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1502-1503
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• 2007

In this paper, inductive coupled LC balun has been desi gned and simulated for embedding into an organic packaging substrate. Inductive coupling method was applied to obtain wide band characteristics, and high dielectric film was utilized to reduce a size of the balun. The proposed balun has a novel scheme which consists of three embedded LC resonators with inductive coupling. This proposed balun has relatively small inductance and capacitance values which can be easily embedded into the organic packaging substrate. Furthermore, it has a good phase imbalance characteristic. The simulated results of proposed balun are an insertion loss of 1.2 dB, a return loss of 10 dB, a phase imbalance of 1 degree at frequency bandwidth of 750 MHz ranged from 1.8 GHz to 2.55 GHz, respectively. This balun has an area of $2mm{\tims}3.5mm{\times}0.66mm$ (height).

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.262-263
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• 2007

In this paper, fully embedded and miniaturized diplexer has been designed, fabricated, and characterized for dual-band/mode CDMA handset applications. The size of the embedded diplexer is significantly reduced by embedding high Q circular spiral inductors and high DK MIM capacitors into low cost organic package substrate. The fabricated diplexer has insertion losses and isolations of -0.5 and -23dB at 824-894MHz and -0.7 and -22dB at 1850-1990MHz, respectively. Its size is 3.9mm$\times$3.9mm$\times$ 0.77mm (height). The fabricated diplexer is the smallest one which is fully embedded into low cost organic package substrate.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.3
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• pp.23-36
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• 2019

Stretchable electronic systems have recently been gaining more and more attention because of their potential applications in various implements such as electronic skins and wearable/shape-deformable electronics. An essential factor of the stable stretchable device implementation is that all the elements constituting the system must have sufficient elasticity and exhibit stable performances even under repetitive stretching conditions. In this paper, we review the latest research results to secure the stable stretchability of electrodes among the various components of the system.

• Journal of the Semiconductor & Display Technology
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• v.20 no.4
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• pp.167-170
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• 2021

Integrated passive device (IPD) technology has emerged with the need for 5G. In order to integrate and miniaturize capacitors inside IPD, various studies are actively performed using high-k materials and trench structures. In this paper, an EM(Electromagnetic) simulation study was performed by applying an oxide dielectric to the capacitors having a various trench type structures. Commercially available materials HfO₂, Al₂O₃, and Ta₂O₅ are applied to non, circle, trefoil, and quatrefoil type trench structures to confirm changes in each material or structure. As a result, the bigger the capacitor area and the higher dielectric constant of the oxide dielectric, the insertion loss tended to decrease.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2004.09a
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• pp.1-26
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• 2004

The implementation of Pb-free solder technology is making good progress in electronic industry. Further understanding on fundamental issues on Pb-free solders/processes is required to reduce reliability risk factors of Pb-free solder joints. Several reliability issues including thermal fatigue, impact reliability, IMC growth, spalling, void formation are reviewed for Pb-free solder joints. Several applications of Pb-free technology are discussed, such as Pb-free, CBGA, CuCGA, flip chips, and wafer bumping by IMS.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.4
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• pp.7-12
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• 2012

Sn whiskers are a serious cause of failure in electronic devices as they create short circuits. Sn whisker growth and mitigation have been investigated by many Japanese consortia including JEITA and JAXA. This paper gives an overview about recent researches of JEITA and JAXA.

• Journal of the Microelectronics and Packaging Society
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• v.5 no.2
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• pp.27-36
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• 1998

통신시스템의 고발열 전자부품 냉각을 위해 3종류의 써모싸이폰을 각각의 용도에 따라 개 발하였으며 그 각각의 설계변수에 대한 냉각특성을 실험적으로 구하였다. TS-I에서는 증발부 내부 에 금속스크린 메쉬형심지를 삽입함으로써 시간에 따른 온도 변화를 작게 하여 냉각성능 안정성을 확보하였고, TS-II에서는 9W/cm2의 높은 냉각성능을 가진 루프형 써모사이폰을 개발하였으며 TS-III에서는 작동유체의 종류, 파이프개수 와이어 삽입여부등 써모사이폰의 주요 설계변수에 따 른 냉각특성을 구하였다.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2001.09a
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• pp.51-69
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• 2001

Japan Jisso Technology Roadmap 2001 (JJTR2001) was published by JEITA in April 2001. Future electronic products request further higher assembly technology (ex. Finer pitch packages & components, 3D assembly, etc.) to reduce size and improve performance of the electric products. For LSI Packages, finer ball pitch technology and finer chip connection technology will be developed. For electric components, further size reduction will be developed. For Jisso (assembly) machine, finer pitch assembly and short tact time technology will be developed. Mr. Utsunomiya will present PCB roadmap next.

• Journal of Welding and Joining
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• v.26 no.1
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• pp.44-49
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• 2008