• Proceedings of the Korean Information Science Society Conference
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• 2004.04a
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• pp.13-15
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• 2004

CC-NUMA 시스템은 메모리를 분산시켜 트랜잭션을 지역화 함으로써 고성능 및 확장성을 꾀하는 구조이다. 그러나 CC-NUMA 시스템에서 여러 병렬 프로그램들이 수행될 경우, 각 프로그램의 부하 차이에 의하여 균등한 네트워크 활용율을 나타내지 못하며. 이중 링 CC-NUMA 시스템에서 이러한 불균등한 네트워크 부하로 인한 성능 감소가 발생한다. 본 논문은 이중 연결 구조중 하나를 건너뜀 연결을 갖도록 배치하여 균등한 네트워크 부하를 나타내도록 하며, 이중 링에 비하여 균등한 네트워크 부하를 나타냄을 시뮬레이션을 통하여 검증한다.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.277-280
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• 2001

The proposed clock generator lowers the operating frequency in a system core though it keeps data bandwidth high because it has a multiphase clocking architecture. Moreover. it has a dual loop which is comprised of an inner analog phase generation loop and outer digital phase control loop. It has both advantages of DLL's wide operating range and DLL's low jitter The proposed design has been demonstrated in terms of the concept and Hspice simulation. All circuits were designed using a 0.25${\mu}{\textrm}{m}$ CMOS process and simulated with 2.5 V power supply.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.9
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• pp.26-37
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• 2016

The core technologies of the current transport network are OAM and protection switching to meet the sub-50ms protection switching time via a path redundancy when a link or node failure occurs. The transport networks owned by public network operators, central/local governments, and major enterprises are individually configured and managed with service resiliency in each own protected sub-network. When such networks are cascaded, it is also important to provide a node resiliency between two protected sub-networks. However, the linear protection switching in packet transport networks, such as MPLS-TP and Carrier Ethernet, does not define a solution of dual node interconnection. Although Ethernet ring protection switching covers the dual node interconnection scheme, a large amount of duplicated data frames may be flooded when a failure occurs on an adjacent (sub) ring. In this paper, we suggest a dual node interconnection scheme with linear protection switching technology in multiple protected sub-networks. And we investigate how various protected sub-network combinations with a proposed linear or ring protection process impact the service resiliency of multiple protected sub-networks through extensive experiments on link and interconnected node failures.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.4
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• pp.433-448
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• 2012

A source-synchronous receiver based on a delay-locked loop is presented. It employs a shared global calibration control between channels, yet achieves channel expandability for high aggregate I/O bandwidth. The global calibration control accomplishes skew calibration, equalizer adaptation, and phase lock of all the channels in a calibration period, resulting in the reduced hardware overhead and area of each data lane. In addition, the weight-adjusted dual-interpolating delay cell, which is used in the multiphase DLL, guarantees sufficient phase linearity without using dummy delay cells, while offering a high-frequency operation. The proposed receiver is designed in the 90-nm CMOS technology, and achieves error-free eye openings of more than 0.5 UI across 9-28 inch Nelco4000-6 microstrips at 4-7 Gb/s and more than 0.42 UI at data rates of up to 9 Gb/s. The data lane occupies only $0.152mm^2$ and consumes 69.8 mW, while the rest of the receiver occupies $0.297mm^2$ and consumes 56.0 mW at the 7- Gb/s data-rate and supply voltage of 1.35 V.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.8
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• pp.662-668
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• 2013

Mobile communication systems have been adopting link adaptive transmission schemes such as adaptive modulation and coding (AMC) and hybrid-ARQ (HARQ). Incremental redundancy (IR) HARQ scheme is known to be highly efficient in terms of throughput and power consumption and can be a good solution for mobile communication systems. In this paper, we propose an IR-HARQ scheme based on dual-diagonal parity-type block LDPC codes in which we define a transmission priority of coded bits and propose the sub-packet construction rule. We present the throughput performance of IR-HARQ with various modulation and coding and multi-antenna modes. Consequently, the proposed scheme provides the improvement of system throughput by elaborate link adaptation with CQI information.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.10
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• pp.2209-2216
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• 2011

In this paper, we design a 32-bit eFuse OTP memory for PMICs using MagnaChip's $0.18{\mu}m$ process. We solve a problem of an electrical shortage between an eFuse link and the VSS of a p-substrate in programming by placing an n-well under the eFuse link. Also, we propose a WL driver circuit which activates the RWL (read word-line) or WWL (write word-line) of a dual-port eFuse OTP memory cell selectively when a decoded WERP (WL enable for read or program) signal is inputted to the eFuse OTP memory directly. Furthermore, we reduce the layout area of the control circuit by removing a delay chain in the BL precharging circuit. We'can obtain an yield of 100% at a program voltage of 5.5V on 94 manufactured sample dies when measured with memory tester equipment.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.6
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• pp.437-445
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• 2021

This paper proposes an operating frequency design method that limits the voltage applied to aload-side converter during the initial operation of a loosely coupled resonant dual-active bridge (LCR-DAB) converter and an initial operating strategy that applies it. The LCR-DAB converter uses two wireless power transfer coils instead of the high-frequency transformer of the general DAB converter. The wireless power coil has a physical distance of several tens of millimeter or more between the two coils; thus, the LCR-DAB converter is a bidirectional isolated power conversion system that can easily achieve high insulation performance. However, for the initial operation of the LCR-DAB, if the power-side converter is operated at the resonance frequency while the load-side converter is not operating, then a very high voltage due to resonance is applied to the load-side converter, thereby causing damage to the converter. Therefore, a method that can stably charge the DC link voltage of the secondary-side converter during the initial operation is needed. This paper proposes a method to initially charge the secondary-side DC link by operating the primary-side converter at a frequency with limited voltage gain rather than at a steady-state operating frequency. The validity of the proposed frequency design method and initial operating sequence is verified through simulation and experimentation of the 1 KW LCR-DAB converter.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.2
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• pp.127-134
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• 2015

In this paper, we propose 2.6 GHz single band dual polarization MIMO omni antenna for in-building applications. The proposed antenna operates at 2.6 GHz single LTE band, Up-link 2.52~2.54 GHz and Down-link 2.64~2.66 GHz. Horizontal and vertical polarizations of the antenna has been, respectively, constructed by the synthesis of four folded loop antennas and the folded monopole antenna. The height of the MIMO omni-directional antenna is minimized to be less than ${\lambda}/13.5$ from the ground. The measurement results show excellent MIMO omni antenna performance of 2.85 dBi vertical polarization gain, 2.29 dBi horizontal polarization gain, and 19.25 dB port isolation.

• Structural Engineering and Mechanics
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• v.47 no.6
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• pp.881-898
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• 2013

This paper describes analytical investigation into a new dual function system including a couple of shear links which are connected in series using chevron bracing capable to correlate its performance with magnitude of earthquakes. In this proposed system, called Chevron Knee-Vertical Link Beam braced system (CK-VLB), the inherent hysteretic damping of vertical link beam placed above chevron bracing is exclusively utilized to dissipate the energy of moderate earthquakes through web plastic shear distortion while the rest of the structural elements are in elastic range. Under strong earthquakes, plastic deformation of VLB will be halted via restraining it by Stopper Device (SD) and further imposed displacement subsequently causes yielding of the knee elements located at the bottom of chevron bracing to significantly increase the energy dissipation capacity level. In this paper first by studying the knee yielding mode, a suitable shape and angle for diagonal-knee bracing is proposed. Then finite elements models are developed. Monotonic and cyclic analyses have been conducted to compare dissipation capacities on three individual models of passive systems (CK-VLB, knee braced system and SPS system) by General-purpose finite element program ABAQUS in which a bilinear kinematic hardening model is incorporated to trace the material nonlinearity. Also quasi-static cyclic loading based on the guidelines presented in ATC-24 has been imposed to different models of CK-VLB with changing of vertical link beam section in order to find prime effectiveness on structural frames. Results show that CK-VLB system exhibits stable behavior and is capable of dissipating a significant amount of energy in two separate levels of lateral forces due to different probable earthquakes.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.5B no.4
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• pp.366-373
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• 2005

This paper presents two new circuit topologies of the dc busline side active resonant snubber assisted voltage source high frequency link soft switching PWM full-bridge dc-dc power converters acceptable for either utility ac 200V-rms or ac 400V-rms input grid. These high frequency switching dc-dc converters proposed in this paper are composed of a typical voltage source-fed full-bridge PWM inverter, high frequency transformer with center tap, high frequency diode rectifier with inductor input filter and dc busline side series switches with the aid of a dc busline parallel capacitive lossless snubber. All the active switches in the full-bridge arms as well as dc busline snubber can achieve ZCS turn-on and ZVS turn-off transition commutation with the aid of a transformer leakage inductive component and consequently the total switching power losses can be effectively reduced. So that, a high switching frequency operation of IGBTs in the voltage source full bridge inverter can be actually designed more than about 20 kHz. It is confirmed that the more the switching frequency of full-bridge soft switching inverter increases, the more soft switching PWM dc-dc converter with a high frequency transformer link has remarkable advantages for its power conversion efficiency and power density implementations as compared with the conventional hard switching PWM inverter type dc-dc power converter. The effectiveness of these new dc-dc power converter topologies can be proved to be more suitable for low voltage and large current dc-dc power supply as arc welding equipment from a practical point of view.