• 제목/요약/키워드: dual-core

검색결과 239건 처리시간 0.026초

멀티코어 기반의 임베디드 시스템에서 안드로이드 부팅 속도 향상 방법 (An Improving Method of Android Boot Speed in Multi-core based Embedded System)

  • 최진용;이재흥
    • 전기전자학회논문지
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    • 제17권4호
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    • pp.564-569
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    • 2013
  • 현재 임베디드 기기는 멀티코어로 급성장하고 있으며 빠른 부팅 속도를 요구하고 있다. 하지만 기존의 부팅 기술은 하나의 코어만을 사용하고 있다. 따라서 본 논문에서는 분석 도구를 통해 안드로이드 부트 프로세스를 분석후, CPU연산이 많은 곳에 병렬 기법을 적용하는 방법과 멀티 코어의 성능을 최대로 끌어내기 위해 CPU주파수 정책을 변경함으로써 멀티코어 기반에서 안드로이드 부팅 속도 향상 방법에 대해 제안한다. 본 논문의 제안 방법을 듀얼 코어 S5PV310과 쿼드 코어 Exynos4412에 각각 적용시킨 뒤 부팅 완료 시간을 측정하였으며 기존의 방법과 제안 방법의 시간을 비교한 결과 듀얼코어와 쿼드코어에서 각각 약 20.71%, 약 31.34%의 속도 성능향상을 가져왔다.

Impact resistance efficiency of bio-inspired sandwich beam with different arched core materials

  • Kueh, Ahmad B.H.;Tan, Chun-Yean;Yahya, Mohd Yazid;Wahit, Mat Uzir
    • Steel and Composite Structures
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    • 제44권1호
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    • pp.105-117
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    • 2022
  • Impact resistance efficiency of the newly designed sandwich beam with a laterally arched core as bio-inspired by the woodpecker is numerically investigated. The principal components of the beam comprise a dual-core system sandwiched by the top and bottom laminated CFRP skins. Different materials, including hot melt adhesive, high-density polyethylene (HDPE), acrylonitrile butadiene styrene (ABS), epoxy resin (EPON862), aluminum (Al6061), and mild carbon steel (AISI1018), are considered for the side-arched core layer of the beam for impact efficiency assessment. The aluminum honeycomb takes the role of the second core. Contact force, stress, damage formation, and impact energy for beams equipped with different materials are examined. A diversity in performance superiority is noticed in each of these indicators for different core materials. Therefore, for overall performance appraisal, the impact resistance efficiency index, which covers several chief impact performance parameters, of each sandwich beam is computed and compared. The impact resistance efficiency index of the structure equipped with the AISI1018 core is found to be the highest, about 3-10 times greater than other specimens, thus demonstrating its efficacy as the optimal material for the bio-inspired dual-core sandwich beam system.

Fixed Homography-Based Real-Time SW/HW Image Stitching Engine for Motor Vehicles

  • Suk, Jung-Hee;Lyuh, Chun-Gi;Yoon, Sanghoon;Roh, Tae Moon
    • ETRI Journal
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    • 제37권6호
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    • pp.1143-1153
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    • 2015
  • In this paper, we propose an efficient architecture for a real-time image stitching engine for vision SoCs found in motor vehicles. To enlarge the obstacle-detection distance and area for safety, we adopt panoramic images from multiple telegraphic cameras. We propose a stitching method based on a fixed homography that is educed from the initial frame of a video sequence and is used to warp all input images without regeneration. Because the fixed homography is generated only once at the initial state, we can calculate it using SW to reduce HW costs. The proposed warping HW engine is based on a linear transform of the pixel positions of warped images and can reduce the computational complexity by 90% or more as compared to a conventional method. A dual-core SW/HW image stitching engine is applied to stitching input frames in parallel to improve the performance by 70% or more as compared to a single-core engine operation. In addition, a dual-core structure is used to detect a failure in state machines using rock-step logic to satisfy the ISO26262 standard. The dual-core SW/HW image stitching engine is fabricated in SoC with 254,968 gate counts using Global Foundry's 65 nm CMOS process. The single-core engine can make panoramic images from three YCbCr 4:2:0 formatted VGA images at 44 frames per second and frequency of 200 MHz without an LCD display.

임베디드 시스템에서의 공유 메모리 컨트롤러 디바이스 드라이버 설계 (Design of Shared Memory Controller Device Driver in Embedded System)

  • 문지훈;오재철
    • 한국전자통신학회논문지
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    • 제9권6호
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    • pp.703-709
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    • 2014
  • 단일 시스템에 코어별 운영체제를 사용하는 AMP(Asymmetric Multiprocessing) 기반 듀얼 코어에서 프로세서간 데이터를 전달하기 위해서 공유 메모리 기법을 사용한다. 서로 다른 운영체제에서 공유 메모리를 사용하기 위해서는 두 운영체제 사이의 메시지 통신 및 동기화 문제를 해결해 주어야 하는 문제점이 발생한다. 본 논문에서는 듀얼 코어 환경에서 서로 다른 프로세서 코어 사이에서 데이터 공유를 위해서 별도의 메모리 컨트롤러를 이용하였다. 이 컨트롤러는 두 프로세서에서 동시에 접근이 가능 하도록 두 개의 슬레이브 포트를 지정할 수 있으며, 두 프로세서에 의해서 동시에 데이터 처리를 수행할 경우 메모리 중재자에 의해서 슬레이브 포트의 우선 순위를 결정하게 된다. A에서 B 프로세서로 데이터를 전달 시, SRAM 영역을 논리적으로 8개의 페이지로 분리하였다. 여러 프로세스에서 메모리 영역을 사용 하도록 하였으며 페이지당 4KByte의 크기를 갖도록 하였으며, 현재 페이지가 사용 가능한지 아닌지를 판별하기 위해서 4바이트 크기의 컨트롤 레지스터를 이용하였다.

듀얼코어 임베디드 리눅스 시스템에서 공유 메모리 성능 개선 방안 및 성능 분석 (Improvement Method and Performance Analysis of Shared Memory in Dual Core Embedded Linux system)

  • 정지성;김창봉
    • 인터넷정보학회논문지
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    • 제11권4호
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    • pp.95-106
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    • 2010
  • 최근 복잡한 프로그래밍 환경에서 다수의 프로세스들은 서로 협력하기 위하여 서로 통신하고 자원과 정보를 공유한다. 커널에서는 이것이 가능한 방법으로 프로세스간 통신이라는 IPC(Inter-Process Communication)를 제공한다. 리눅스에서 사용되는 공유 메모리는 동일한 메모리 영역에 여러개의 프로세스가 접근할 수 있도록 해 주는 기술이다. 본 논문에서는 서로 다른 코어에 서로 다른 운영체제를 갖는 듀얼코어 임베디드 리눅스 시스템에서 공유 메모리 성능 개선 방안을 제시하고, MP2530F(ARM926F+ARM946E)의 임베디드 리눅스 시스템을 구축하여 성능을 측정한다. 공유 메모리를 이용한 프로세스의 동작이 별개의 CPU에서 동작되도록 함으로써 성능 향상을 꾀한다.

On the Fibonacci Almost Convergent Sequence Space and Fibonacci Core

  • DEMIRIZ, SERKAN;KARA, EMRAH EVREN;BASARIR, METIN
    • Kyungpook Mathematical Journal
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    • 제55권2호
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    • pp.355-372
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    • 2015
  • In the present paper, by using the Fibonacci difference matrix, we introduce the almost convergent sequence space $\hat{c}^f$. Also, we show that the spaces $\hat{c}^f$and $\hat{c}$ are linearly isomorphic. Further, we determine the ${\beta}$-dual of the space $\hat{c}^f$ and characterize some matrix classses on this space. Finally, Fibonacci core of a complex-valued sequence has been introduced, and we prove some inclusion theorems related to this new type of core.

이원중합형 코어 축조용 복합레진의 결합강도에 대한 NaOCI의 영향에 대한 연구 (Influence of Sodium Hypochlorite on Bond Strength of Dual-cured Core Build-up Resin Composite)

  • 이준봉;박종덕;권수미;유미경;이광원
    • 구강회복응용과학지
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    • 제23권4호
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    • pp.283-292
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    • 2007
  • Two-step or one-step bonding systems generally inhibit curing process of dual-cured core build-up resin composite for their adhesive acidity. In addition this dual-cured core build-up resin composite can be applied to dentin of pulp chamber and root at the time that complete the endodontic treatment. The purpose of this investigation was to determine the influence of sodium hypochlorite on rnicrotensile bond strength of dual-cured core build-up resin composite. Extracted human molars were horizontally sectioned with 1mm thickness using low speed diamond saw. After the sectioned specimens were divided into 8 groups, adhesive systems (Clearfil SE-Bond, Prime&Bond NT[2-step, 1-step], Adper Prompt L-Pop) were then applied with or without sodium hypochlorite pretreatment. The treated specimen was filled with dual-cured core build-up resin composite (Luxacore, DMG corp., German). Then light cured for 40 seconds and soaked in $37^{\circ}C$ water bath for 24 hours. After the treated specimen was grinded with 1mm width and measured rnicrotensile bond strength by testing machine. Additionally 8 teeth were prepared for SEM evaluation. The results were as follows. : NaOCl treated groups generally had lower rnicrotensile bond strength but did not show any difference statistically except Adper Prompt L-Pop. When the teeth were treated by NaOCl, though the difference of applied adhesive system, it had no statistically significant difference within the NaOCl treated groups except the relation of between ClearFil SE-Bond adhesive system and Adper Prompt L-Pop adhesive system. In the SEM evaluation, NaOCl treated groups presented relatively long resin tags and incomplete hybrid layer formation generally.

Dual Polarized Array Antenna for S/X Band Active Phased Array Radar Application

  • Han, Min-Seok;Kim, Ju-Man;Park, Dae-Sung;Kim, Hyoung-Joo;Choi, Jae-Hoon
    • Journal of electromagnetic engineering and science
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    • 제10권4호
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    • pp.309-315
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    • 2010
  • A dual-band dual-polarized microstrip antenna array for an advanced multi-function radio function concept (AMRFC) radar application operating at S and X-bands is proposed. Two stacked planar arrays with three different thin substrates (RT/Duroid 5880 substrates with $\varepsilon_r$=2.2 and three different thicknesses of 0.253 mm, 0.508 mm and 0.762 mm) are integrated to provide simultaneous operation at S band (3~3.3 GHz) and X band (9~11 GHz). To allow similar scan ranges for both bands, the S-band elements are selected as perforated patches to enable the placement of the X-band elements within them. Square patches are used as the radiating elements for the X-band. Good agreement exists between the simulated and the measured results. The measured impedance bandwidth (VSWR$\leq$2) of the prototype array reaches 9.5 % and 25 % for the S- and X-bands, respectively. The measured isolation between the two orthogonal polarizations for both bands is better than 15 dB. The measured cross-polarization level is ${\leq}-21$ dB for the S-band and ${\leq}-20$ dB for the X-band.

DAB 컨버터용 전력 변압기의 누설 인덕턴스를 포함한 내부 전력 손실 분석에 관한 연구 (A Study on the Analysis of Internal Power Loss Including Leakage Inductance of Power Transformer for DAB Converter)

  • 유정상;안태영;길용만
    • 반도체디스플레이기술학회지
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    • 제21권2호
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    • pp.95-100
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    • 2022
  • In this paper, a power loss analysis technique of a high-frequency transformer of a bidirectional DAB (Dual Active Bridge) converter is reported. To miniaturize the transformer of the dual active bridge converter, a resonant inductor was designed with an air gap included low-coupled rate state core to combine leakage inductor with the resonant inductor which is required for soft-switching. In this paper, leakage inductance and magnetizing inductance, core material, type of winding and winding method are included in the dual active bridge transformer loss analysis process to enable optimal design at the initial design stage. Transformer loss analysis for dual active bridge with a switching frequency of 200 kHz and maximum output of 5 kW was executed, and elements necessary for design based on the number of turns on the primary side were graphed while maintaining the transformer turns ratio and window area. In particular, it was possible to determine the optimal number of turns and thickness of the transformer, and ultimately, the total loss of the transformer could be estimated.

Dual Band PLL Synthesizer Module(SMD형) 개발에 관한 연구 (Development of Dual Band Synthesizer Module(SMD Type))

  • 윤종남
    • 마이크로전자및패키징학회지
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    • 제9권1호
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    • pp.15-20
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    • 2002
  • 본 연구에서는 Dual Band휴대폰 전화기의 핵심부품인 Dual Band PLL Module의 무선회로 설계 기술, 초소형 설계기술, 표면실장기술, 소형화 SMD기술, Test기술 및 설계기반 마련 및 대외 경쟁력 있는 Dual PLL Module의 초소형화 기술을 확보하였다.

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