• Title/Summary/Keyword: direct-conversion

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Design of lumped six-port phase correlator and performance of lumped direct conversion receiver (집중 소자형 6단자 위상 상관기 설계와 집중 소자형 직접변환 수신 성능)

  • Yu, Jae-Du;Kim, Young-Wan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.5
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    • pp.1071-1077
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    • 2010
  • The six-port phase correlator using lumped elements was designed and fabricated in this paper, also the receiving performance of L-band direct conversion receiver using lumped six-port phase correlator element was analyzed. The proposed L-band lumped six-port phase correlator element was composed of a resistive power divider and the twist-wire coaxial cables. The proposed lumped six-port structure provides the small-sized configuration and wide-band characteristics. The performance of the L-band lumped direct conversion receiver structure was measured under the conditions of 1.69 GHz frequency for LO-CW signal and RF-QPSK signal, which are input signals for the lumped six-port phase correlator element. The direct conversion receiving structure using the proposed lumped six-port phase correlator element can recovered the good digital I/Q signal.

A 3~5 GHz UWB Up-Mixer Block Using 0.18-μm CMOS Technology

  • Kim, Chang-Wan
    • Journal of electromagnetic engineering and science
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    • v.8 no.3
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    • pp.91-95
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    • 2008
  • This paper presents a direct-conversion I/Q up-mixer block, which supports $3{\sim}5$ GHz ultra-wideband(UWB) applications. It consists of a VI converter, a double-balanced mixer, a RF amplifier, and a differential-to-single signal converter. To achieve wideband characteristics over $3{\sim}5$ GHz frequency range, the double-balanced mixer adopts a shunt-peaking load. The proposed RF amplifier can suppress unwanted common-mode input signals with high linearity. The proposed direct-conversion I/Q up-mixer block is implemented using $0.18-{\mu}m$ CMOS technology. The measured results for three channels show a power gain of $-2{\sim}-9$ dB with a gain flatness of 1dB, a maximum output power level of $-7{\sim}-14.5$ dBm, and a output return loss of more than - 8.8 dB. The current consumption of the fabricated chip is 25.2 mA from a 1.8 V power supply.

The Design of A CMOS Gm-C Lowpass Filter with Variable Cutoff Frequency for Direct Conversion Receiver (직접변환 수신기용 가변 차단주파수특성을 갖는 CMOS Gm-C 저역통과필터 설계)

  • Bang, Jun-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.8
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    • pp.1464-1469
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    • 2008
  • A CMOS Gm-C filter with variable cutoff frequency applicable for using in the direct conversion receiver is designed. The designed filter comprises the CMOS differential transconductors, and the gm of the transconductor is controlled by the bias voltage. This configuration can compensate variant of the cutoff frequency which could be generated by external noises, and also be used in multiband receiver. As a results of HSPICE simulation, the control range of the cutoff frequency is $1.5MHz{\sim}3.5MHz$ and the gain control range is $-2.8dB{\sim}2.6dB$. The layout of the designed 5th-order Elliptic low-pass filter is performed to fabricate a chip using $2.5V-0.25{\mu}m$ CMOS processing parameter.

Design of Gain- Tuning Continuous-Time Filter for Direct-Conversion Receiver (직접변환 방식 수신기용 이득 조정 연속시간필터 설계)

  • Kim, Byoung-Wook;Bang, Jun-Ho;Kim, Yeong-Min
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.515-516
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    • 2007
  • A novel design of contious-time filter for direct conversion receiver applications is proposed. The filter supports different modes including GSM, WCDMA. A 5th chebyshev filter is realized in a gm-C filter topology. The filter circuit is implemented in a standard CMOS $0.35{\mu}m$ processing parameter with a supply voltage of 2.5V. The HSPICE results show that the filter has 200KHz and 5MHz cutoff frequency, and each 3.4us and 85.44us gm value.

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Performance Comparison According to Image Generation Method in NIDS (Network Intrusion Detection System) using CNN

  • Sang Hyun, Kim
    • International journal of advanced smart convergence
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    • v.12 no.2
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    • pp.67-75
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    • 2023
  • Recently, many studies have been conducted on ways to utilize AI technology in NIDS (Network Intrusion Detection System). In particular, CNN-based NIDS generally shows excellent performance. CNN is basically a method of using correlation between pixels existing in an image. Therefore, the method of generating an image is very important in CNN. In this paper, the performance comparison of CNN-based NIDS according to the image generation method was performed. The image generation methods used in the experiment are a direct conversion method and a one-hot encoding based method. As a result of the experiment, the performance of NIDS was different depending on the image generation method. In particular, it was confirmed that the method combining the direct conversion method and the one-hot encoding based method proposed in this paper showed the best performance.

The Fast Correlative Vector Direction Finder Conversion (직접 변환을 이용한 고속 상관형 벡터 방향탐지기)

  • Park, Cheol-Sun;Kim, Dae-Young
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.12 s.354
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    • pp.16-23
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    • 2006
  • This paper presents the development of the fast Direction Finder using direct conversion method, which can intercept for short pulse signal of less' than 1 msec. in RF Down Converter, and CVDF(Correlative Vector Direction Finding) algorithm, which estimates DoA (Direction of Arrival). The configuration and characteristics of direction finder using 5-channel equi-spaced circular array antenna are presented and the direct conversion techniques for removing tuning time using I/Q demodulator are described. The CRLB of our model is derived, the principles of 2 kind of CVDF algorithm are explained and their characteristics are compared with CRLB w.r.t the number of samples and spacing ratio. The RF Down Converter prototype using direct conversion method is manufactured, the 2 kind of CVDF algorithm are applied and their performance are analyzed. Finally it is confirmed the LSE based CVDF algorithm is better than correlation-coefficient based except for ambiguity protection capabilities.

Numerical simulation of compressive to tensile load conversion for determining the tensile strength of ultra-high performance concrete

  • Haeri, Hadi;Mirshekari, Nader;Sarfarazi, Vahab;Marji, Mohammad Fatehi
    • Smart Structures and Systems
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    • v.26 no.5
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    • pp.605-617
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    • 2020
  • In this study, the experimental tests for the direct tensile strength measurement of Ultra-High Performance Concrete (UHPC) were numerically modeled by using the discrete element method (circle type element) and Finite Element Method (FEM). The experimental tests used for the laboratory tensile strength measurement is the Compressive-to-Tensile Load Conversion (CTLC) device. In this paper, the failure process including the cracks initiation, propagation and coalescence studied and then the direct tensile strength of the UHPC specimens measured by the novel apparatus i.e., CTLC device. For this purpose, the UHPC member (each containing a central hole) prepared, and situated in the CTLC device which in turn placed in the universal testing machine. The direct tensile strength of the member is measured due to the direct tensile stress which is applied to this specimen by the CTLC device. This novel device transferring the applied compressive load to that of the tensile during the testing process. The UHPC beam specimen of size 150 × 60 × 190 mm and internal hole of 75 × 60 mm was used in this study. The rate of the applied compressive load to CTLC device through the universal testing machine was 0.02 MPa/s. The direct tensile strength of UHPC was found using a new formula based on the present analyses. The numerical simulation given in this study gives the tensile strength and failure behavior of the UHPC very close to those obtained experimentally by the CTLC device implemented in the universal testing machine. The percent variation between experimental results and numerical results was found as nearly 2%. PFC2D simulations of the direct tensile strength measuring specimen and ABAQUS simulation of the tested CTLC specimens both demonstrate the validity and capability of the proposed testing procedure for the direct tensile strength measurement of UHPC specimens.

CMOS Direct-Conversion RF Front-End Design for 5-GHz WLAN

  • Oh, Nam-Jin
    • Journal of electromagnetic engineering and science
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    • v.8 no.3
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    • pp.114-118
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    • 2008
  • Direct-conversion RF front-end for 5-GHz WLAN is implemented in $0.18-{\mu}m$ CMOS technology. The front-end consists of a low noise amplifier, and low flicker noise down-conversion mixers. For the mixer, an inductor is included to resonate out parasitic tail capacitances in the transconductance stage at the operating frequency, thereby improves the flicker noise performance of the mixer, and the overall noise performance of the front-end. The receiver RF front-end has 6.5 dB noise figure, - 13 dBm input IP3, and voltage conversion gain of 20 dB with the power consumption of 30 mW.

High-Performance Elevator Traction Using Direct Torque Controlled Induction Motor Drive

  • Arafa, Osama Mohamed;Abdallah, Mohamed Elsayed;Aziz, Ghada Ahmed Abdel
    • Journal of Electrical Engineering and Technology
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    • v.13 no.3
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    • pp.1156-1165
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    • 2018
  • This paper presents a detailed realization of direct torque controlled induction motor drive for elevator applications. The drive is controlled according to the well-known space vector modulated direct control scheme (SVM-DTC). As the elevator drives are usually equipped with speed sensors, flux estimation is carried out using a current model where two stator currents are measured and accurate instantaneous rotor speed measurement is used to overcome the need for measuring stator voltages. Speed profiling for a comfortable elevator ride and other supervisory control activities to provide smooth operation are also explained. The drive performance is examined and controllers' parameters are fine-tuned using MATLAB/SIMULINK. The blocks used for flux and torque estimation and control in the offline simulation are compiled for real-time using dSPACE Microlabox. The performance of the drive has been verified experimentally. The results show good performance under transient and steady state conditions.

Zigbee Transmitter Using a Low-Power High-Gain Up-Conversion Mixer (저 전력 고 이득 주파수 상향변환기를 이용한 Zigbee 송신기 설계)

  • Baik, Seyoung;Seo, Changwon;Jin, Ho Jeong;Cho, Choon Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.9
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    • pp.825-833
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    • 2016
  • This paper introduces a direct-conversion CMOS RF transmitter for the IEEE 802.15.4 standard with a low-power high-gain up-conversion mixer designed in $0.18{\mu}m$ process. The designed RF DCT(Direct Conversion Transmitter) is composed of differential DAC(Digital to Analog Converter), passive low-pass filter, quadrature active mixer and drive amplifier. The most important characteristic in designing RF DCT is to satisfy the 2.4 GHz Zigbee standard in low power. The quadrature active mixer inside the proposed RF DCT provides enough high gain as well as sufficient linearity using a gain boosting technique. The measurement results for the proposed transmitter show very low power consumption of 7.8 mA, output power more than 0 dBm and ACPR (Adjacent Channel Power Ratio) of -30 dBc.