• Korean Journal of Materials Research
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• v.2 no.4
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• pp.241-247
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• 1992

The direct bonding of Cu to $Al_2O_3$, employing the $Cu-Cu_2$O eutectic skin melt, is investigated. The bonding force and interface structure of samples prepared by oxidation at $1015^{\circ}C$ in $1.5{\times}10^{-1}$torr followed by bonding at 107$5^{\circ}C$ under $10_{-3}$ torr vacuum have been studied using peeling test, SEM, EDS and XRD. It has been found that the optimal strength is obtained for 3 minutes of oxidation while the adhesion force is decreased with oxidation shorter or longer than 3 minutes. The rupture occured at alumina-eutectic interface. Fractured surface of $Al_2O_3$covered with $Cu_2$O nodules pulled out of the Cu indicates that bonding strength is governed by $Cu-Cu_2$O interface and not by $Cu_2$O-A$l_2O_3$interface. The bonding force is slightly increased with bonding time and the reaction phases of CuA$l_2O_4$and $CuAlO_2$are formed at interface during the bonding.

• Journal of Welding and Joining
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• v.30 no.3
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• pp.26-31
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• 2012

Three-dimensional integrated circuit (3D IC) technology has become increasingly important due to the demand for high system performance and functionality. We have evaluated the effect of Buffered oxide etch (BOE) on the interfacial bonding strength of Cu-Cu pattern direct bonding. X-ray photoelectron spectroscopy (XPS) analysis of Cu surface revealed that Cu surface oxide layer was partially removed by BOE 2min. Two 8-inch Cu pattern wafers were bonded at $400^{\circ}C$ via the thermo-compression method. The interfacial adhesion energy of Cu-Cu bonding was quantitatively measured by the four-point bending method. After BOE 2min wet etching, the measured interfacial adhesion energies of pattern density for 0.06, 0.09, and 0.23 were $4.52J/m^2$, $5.06J/m^2$ and $3.42J/m^2$, respectively, which were lower than $5J/m^2$. Therefore, the effective removal of Cu surface oxide is critical to have reliable bonding quality of Cu pattern direct bonds.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2018.06a
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• pp.102-102
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• 2018

Electronic industry had required the finer size and the higher performance of the device. Therefore, 3-D die stacking technology such as TSV (through silicon via) and micro-bump had been used. Moreover, by the development of the 3-D die stacking technology, 3-D structure such as chip to chip (c2c) and chip to wafer (c2w) had become practicable. These technologies led to the appearance of HBM (high bandwidth memory). HBM was type of the memory, which is composed of several stacked layers of the memory chips. Each memory chips were connected by TSV and micro-bump. Thus, HBM had lower RC delay and higher performance of data processing than the conventional memory. Moreover, due to the development of the IT industry such as, AI (artificial intelligence), IOT (internet of things), and VR (virtual reality), the lower pitch size and the higher density were required to micro-electronics. Particularly, to obtain the fine pitch, some of the method such as copper pillar, nickel diffusion barrier, and tin-silver or tin-silver-copper based bump had been utillized. TCB (thermal compression bonding) and reflow process (thermal aging) were conventional method to bond between tin-silver or tin-silver-copper caps in the temperature range of 200 to 300 degrees. However, because of tin overflow which caused by higher operating temperature than melting point of Tin ($232^{\circ}C$), there would be the danger of bump bridge failure in fine-pitch bonding. Furthermore, regulating the phase of IMC (intermetallic compound) which was located between nickel diffusion barrier and bump, had a lot of problems. For example, an excess of kirkendall void which provides site of brittle fracture occurs at IMC layer after reflow process. The essential solution to reduce the difficulty of bump bonding process is copper to copper direct bonding below $300^{\circ}C$. In this study, in order to improve the problem of bump bonding process, copper to copper direct bonding was performed below $300^{\circ}C$. The driving force of bonding was the self-annealing properties of electrodeposited Cu with high defect density. The self-annealing property originated in high defect density and non-equilibrium grain boundaries at the triple junction. The electrodeposited Cu at high current density and low bath temperature was fabricated by electroplating on copper deposited silicon wafer. The copper-copper bonding experiments was conducted using thermal pressing machine. The condition of investigation such as thermal parameter and pressure parameter were varied to acquire proper bonded specimens. The bonded interface was characterized by SEM (scanning electron microscope) and OM (optical microscope). The density of grain boundary and defects were examined by TEM (transmission electron microscopy).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1995.11a
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• pp.81-84
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• 1995

A reliable bonding between two silicon wafers, regularly grooved and non-grooved, was done by the direct boning technology, It is Presented that high structural duality was realized not only at the bended interface but in the bulk, commensurate with the filling of artificial grooves, which would be attributed to the dislocation-gettering capability of groove free-surfaces during annealing. The groove filling would be explained with mass-transport phenomena assisted by the dislocation movement from initial contact boundaries toward groove surfaces. Intrinsic voids can be easily removed by aid of the grooves. The proposed method yielded also an intimate bonding not only between {111} wafers strongly misoriented and slightly inclined to {111} basal plane but even between {111} and {100} orientation wafers.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.10
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• pp.815-819
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• 1998

The silicon-nirtide membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PRO($PbTiO_3$ ) layer for a IR detection was coated on the membrane and its characteristics were measured. The a attack of PTO layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer were eliminated through the method of bonding/etching of silicon wafer. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by the PTO layer were measured, too.

• Transactions of Materials Processing
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• v.31 no.6
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• pp.337-343
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• 2022

Electrically assisted pressure joining (EAPJ) utilizes electric current-induced kinetic enhancement to achieve solid state diffusion bonding within a short time. In this study, aluminum alloy specimens, which are known as a hard-to-weld metal, were successfully solid-state joined through EAPJ. The bonding process was performed in two ways: continuous direct current (CDC), which applies relatively low current density, and pulsed direct current (PDC), which applies high current density. It was observed that the bonding strength was higher in PDC than in CDC. The microstructure of the joint was characterized using 3D X-ray microscopy (XRM) and electron backscatter diffraction (EBSD).

• Proceedings of the KWS Conference
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• 2002.10a
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• pp.769-775
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• 2002

The results gained as part of the study on weldability of compositions from steels, aluminium, titanium alloys in various combinations including similar and dissimilar metal bonding variants with reference to solution of specific practical problems are presented in this work. It has been shown that in the case of HIP/DB carried out with direct interaction of bonding surfaces of the most dissimilar material combinations under study, formation of high-quality joints is not assured due to various reasons. That is why development of special bonding techniques was required. The bonding techniques developed and used for HIP/DB of dissimilar steels, "Steel-bronze", "Titanium-niobium"; "Titanium-steel" and other compositions under study ensured vacuum-tight microvoid-free joints strength of a which was equal to the milder parent metal, including those obtained at reduced welding pressures. Examples of new products manufactured by HIP/DB using the technologies developed are presented.

• Journal of Surface Science and Engineering
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• v.33 no.2
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• pp.101-106
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• 2000

SOI (Silicon-On-Insulator) substrates were fabricated with varying annealing temperature of $25-660^{\circ}C$ by a linear annealing method, which was modified RTA process using a linear shape heat source. The annealing method was applied to Si ∥ $SiO_2$/Si pair pre-contacted at room temperature after wet cleaning process. The bonding strength of SOI substrates was measured by two methods of Razor-blade crack opening and direct tensile test. The fractured surfaces after direct tensile test were also investigated by the optical microscope as well as $\alpha$-STEP gauge. The interface bonding energy was 1140mJ/m$^2$ at the annealing temperature of $430^{\circ}C$. The fracture strength was about 21MPa at the temperature of $430^{\circ}C$. These mechanical properties were not reported with the conventional furnace annealing or rapid thermal annealing method at the temperature below $500^{\circ}C$. Our results imply that the bonded wafer pair could endure CMP (Chemo-Mechanical Polishing) or Lapping process without debonding, fracture or dopant redistribution.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.7
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• pp.424-432
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• 2000

The plasma surface treatment, using hydrogen gas, of the silicon wafer was investigated as a pretreatment for the application to silicon-on-insulator (SOI) wafers using the silicon direct bonding technique. The chemical reactions of hydrogen plasma with surfaces were used for both the surface activation and the removal of surface contaminants. As a result of exposure of silicon wafer to the plasma, an active oxide layer was formed on the surface, which was rendered hydrophilic. The surface roughness and morphology were estimated as functions of plasma exposing time as well as of power. The surface became smoother with decreased incident hydrogen ion flux by reducing plasma exposing time and power. This process was very effective to reduce the carbon contaminants on the silicon surface, which was responsible for a high initial surface energy. The initial surface energy measured by the crack propagation method was 506 mJ/m2, which was up to about three times higher than that of a conventional RCA cleaning method.

• Journal of Sensor Science and Technology
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• v.14 no.3
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• pp.206-210
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• 2005

The SOI structure with buried alumina was fabricated by ALD followed by bonding and etchback process. The interface of alumina and silicon was analyzed by CV measurements and cross section was investigated by SEM analysis. The density of interface state of alumina and silicon was 2.5E11/$cm^{2}$-eV after high temperature annealing for wafer bonding. It was confirmed that the surface silicon layer was completely isolated from substrate by cross section SEM and AES depth profile. The device on this alumina SOI structure would have better thermal properties than that on conventional SOI due to higher thermal conductivity of alumina than that of silicon dioxide.