• Title/Summary/Keyword: digital signal processor

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Statistical Simulation for Superscalar DSP Processors (수퍼스칼라 디지털 신호처리 프로세서에 대한 통계적 모의실험)

  • Lee, Jong-Bok
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.1217-1220
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    • 2005
  • In this paper, statistical simulation is applied to a superscalar digital signal processor architecture using DSP kernel and DSP application benchmarks. As a result, the performance of a digital signal processor with several microarchitecture configurations can be estimated with the relative error of 3.7 ${\backslash}%$ on the average.

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Vibration control of active magnetic bearing systems using digital signal processor

  • Shimomachi, T.;Fukata, S.;Kouta, Y.;Ishimatsu, T.
    • 제어로봇시스템학회:학술대회논문집
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    • 1990.10b
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    • pp.1178-1183
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    • 1990
  • A digital signal processor(DSP) is applied to realizing a compensator of control system of active magnetic bearings, to restrict a resonance caused by the first-order bending vibration of a flexible rotor, and to run the rotor beyond the critical speed. A full-order observer is applied to the translatory rotor-motion with the first-order vibration mode. A PID control is used for the conical motion. The rotor used in the experiments is symmetric, and an electromagnet and a displacement sensor are set in collocation.

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A Fetal ECG Signal Monitoring System Using Digital Signal Processor (디지털 신호처리기를 사용한 태아심전도 신호 추출 시스템)

  • 박영철;조병모;김남현;김원기;박상휘;연대희
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.9
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    • pp.1444-1452
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    • 1989
  • This paper describes the implementation of a real time fetal ECG monitoring system in which an adaptive multi-channel noise canceller is realized using the Texas Instruments TMS32020 progrmmmable ditital signal processor. An ECG signal from the electrode placed on the mother's abdomen and three ECGs from those on the chest are applied as the desired signal and the referened inputs, respectively, of the multi-channel filter. The coefficients of the filter are updated using the LMS algorithm such that the output of the multi-channel filter copies the maternal ECG embedded in the abdominal ECG. The enhanced fetal ECG is obtained by subtracting the filter output from the abdominal ECG, and the difference signal is recorded. Both off-line and on-line experimental results are presented to verify the effectiveness of the parameters for the digital signal processing algorithms and the prototype system.

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A Compensation of Linear Distortion for Loudspeaker Using the Adaptive Digital Filter (적응 디지탈 필터를 이용한 확성용 스피커의 선형 왜곡 보상)

  • 전희영;차일환
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 1995.06a
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    • pp.165-170
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    • 1995
  • In this paper, it is attempted to apply the adaptive digital signal processing to compensate for a linear distortion of a loudspeaker and implement a real time hardware for that purpose. The real time system is implemented by using the DSP56001, a general purpose signal processor, as a host processor and the DSP56200, a cascadable adaptive FIR filter peripheral chip, as an adaptive digital filter. The system has 1000 taps at a 44.1kHz. After inverse modeling of under_compensation_speaker, the system reduces loudspeaker's linear distortions by pre-processing an input audio signal to loudspeaker. The experiment shows satisfactory results; after adaption with white noise as input signal for 60sec, the flat amplitude and linear phase frequency characteristics is found to lie over a wide frequency range of 100Hz to 20kHz.

A Study about Direction Estimate Device of the Sound Source using Input Time Difference by Microphones′ Arrangement (마이크로폰 배열로 발생되는 입력 시간차를 이용한 음원의 방향 추정 장치에 관한 연구)

  • 윤준호;최기훈;유재명
    • Journal of the Korean Society for Precision Engineering
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    • v.21 no.5
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    • pp.91-98
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    • 2004
  • Human uses level difference and time difference to get space information. Therefore this paper shows that method to presume direction of sound source by time difference and to mark presumed position. The position means direction from geometrical center of sensors to the sound source. To get the time difference of microphones input level, we will be explained about arrangement of microphones which used for the sensor to take the sound signal. It is included distance among the 3 microphones and distance between microphones and sound source. Secondly, input signals are transmitted to CPU througth digital process. CPU is used to DSP(Digital Signal Processor) for manage the signal by real time. Finally, the position of sound source is perceived by an explained algorithm in this paper.

A Strap-Down Inertial Measuring Unit for Motion Measurement of an AUV (AUV의 운동계측을 위한 스트랩-다운형 관성계측장치(IMU)의 개발)

  • 이판묵;전봉환;이종식;오준호;김도현
    • Journal of Ocean Engineering and Technology
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    • v.11 no.1
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    • pp.95-105
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    • 1997
  • This paper presents a Inertial Measuring Unit(IMU) for motion measurement of an AUV. The IMU is composed of three parts: inertial sensors with three servo accelerometers and three rate gyros, an analog/digital interface board, and a signal processing board with TMS320C31 DSP processor. The IMU is a class of strap-down inwetial navigation system does not applicable directly to the navigation system in consequence of the AUV and integrated sensors for an integrated navigation system of the AUV. Fast calculstion of direction cosine matrix for the coordinate transformation body to reference is obtained through the DSP processor. A switching algotrithm is used to lessen the low frequency drift effect of the gyros in the vertical plane with use of low pass filtering of the signal of the accelerometers.

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DSP-Based Digital Controller for Multi-Phase Synchronous Buck Converters

  • Kim, Jung-Hoon;Lim, Jeong-Gyu;Chung, Se-Kyo;Song, Yu-Jin
    • Journal of Power Electronics
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    • v.9 no.3
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    • pp.410-417
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    • 2009
  • This paper represents a design and implementation of a digital controller for a multi-phase synchronous buck converter (SBC) using a digital signal processor (DSP). The multi-phase SBC has generally been used for a voltage regulation module (VRM) of a microprocessor because of its high current handling capability at a low output voltage. The VRM requires high control performance of tight output regulation, high slew rate, and load sharing capability of multiple converters. In order to achieve these requirements, the design and implementation of a digital control system for a multi-phase SBC are presented in this paper. The digital PWM generation, current sensing, and voltage and current controller using a DSP TMS320F2812 are considered. The experimental results are provided to show the validity of the implemented digital control system.

Implementation of a Mini ECG Using a Digital Filter (디지털 필터를 이용한 소형 심전도계의 구현)

  • An, Jonghyun;Kim, Kiwan
    • Journal of the Semiconductor & Display Technology
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    • v.20 no.2
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    • pp.77-81
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    • 2021
  • In this paper, a low-csst ECG system using a digital filter was implemented. After amplifying the analog ECG signal, it is converted into a digital signal and filtered. The developed ECG module is miniaturized by removing the analog filter element that occupies the existing volume and replacing it with a digital filter using a 3-stage Butterworth filter which is one of IIR filters. It uses a serial monitoring program with C# to check and save the ECG waveform measured on a computer screen. The ECG system using a developed digital filter in this paper uses a low-cost processor instead of an expensive, high-end processor, and its size and price are reduced by converting the analog filter to a digital filter. In addition, since the waveform of the developed ECG system is similar to the actual ECG waveform of MIT-BIU, it is considered that the existing analog filter can be replaced with the developed digital filter.

Real Time FECG Monitoring System Using Digital Signal Process (디지탈 신호처리에 의한 실시간 태아 심전도 감시 시스템에 관한 연구 I)

  • 김남현;유선국;이건기;윤대희;김원기;박상희
    • 제어로봇시스템학회:학술대회논문집
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    • 1988.10a
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    • pp.722-724
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    • 1988
  • In this study, 8 ch. FECG signal storage system with general cassette recorder and amplifier is developed, and simulated LMS algorithm. In future we construct real time FECG monitor system that is used digital signal processor.

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The Design of Expansible Digital Pulse Compressor Using Digital Signal Processors (DSP를 이용한 확장 가능한 디지털 펄스압축기 설계)

  • 신현익;류영진;김환우
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.40 no.3
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    • pp.93-98
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    • 2003
  • With the improvement of digital signal processors, digital pulse compressor(DPC) is widely used in radar systems. The DPC can be implemented by using FIR filter algorithm in time domain or FFT algorithm in frequency domain. This paper designs an expansible DPC using multiple DSPs. With ADSP-21060 of Analog Devices Inc., the computation time as a function of the number of received range cells and FIR filter tap is compared and analyzed in time domain using C-language and assembly language. therefore, when radar system parameters are determined, the number of DSP's required to implement DPC can be easily estimated.