• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.1217-1220
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• 2005

In this paper, statistical simulation is applied to a superscalar digital signal processor architecture using DSP kernel and DSP application benchmarks. As a result, the performance of a digital signal processor with several microarchitecture configurations can be estimated with the relative error of 3.7 ${\backslash}%$ on the average.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1990년도 한국자동제어학술회의논문집(국제학술편); KOEX, Seoul; 26-27 Oct. 1990
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• pp.1178-1183
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• 1990

A digital signal processor(DSP) is applied to realizing a compensator of control system of active magnetic bearings, to restrict a resonance caused by the first-order bending vibration of a flexible rotor, and to run the rotor beyond the critical speed. A full-order observer is applied to the translatory rotor-motion with the first-order vibration mode. A PID control is used for the conical motion. The rotor used in the experiments is symmetric, and an electromagnet and a displacement sensor are set in collocation.

• 대한전자공학회논문지
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• 제26권9호
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• pp.1444-1452
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• 1989

This paper describes the implementation of a real time fetal ECG monitoring system in which an adaptive multi-channel noise canceller is realized using the Texas Instruments TMS32020 progrmmmable ditital signal processor. An ECG signal from the electrode placed on the mother's abdomen and three ECGs from those on the chest are applied as the desired signal and the referened inputs, respectively, of the multi-channel filter. The coefficients of the filter are updated using the LMS algorithm such that the output of the multi-channel filter copies the maternal ECG embedded in the abdominal ECG. The enhanced fetal ECG is obtained by subtracting the filter output from the abdominal ECG, and the difference signal is recorded. Both off-line and on-line experimental results are presented to verify the effectiveness of the parameters for the digital signal processing algorithms and the prototype system.

• 한국방송∙미디어공학회:학술대회논문집
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• 한국방송공학회 1995년도 학술대회
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• pp.165-170
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• 1995

In this paper, it is attempted to apply the adaptive digital signal processing to compensate for a linear distortion of a loudspeaker and implement a real time hardware for that purpose. The real time system is implemented by using the DSP56001, a general purpose signal processor, as a host processor and the DSP56200, a cascadable adaptive FIR filter peripheral chip, as an adaptive digital filter. The system has 1000 taps at a 44.1kHz. After inverse modeling of under_compensation_speaker, the system reduces loudspeaker's linear distortions by pre-processing an input audio signal to loudspeaker. The experiment shows satisfactory results; after adaption with white noise as input signal for 60sec, the flat amplitude and linear phase frequency characteristics is found to lie over a wide frequency range of 100Hz to 20kHz.

• 한국정밀공학회지
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• 제21권5호
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• pp.91-98
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• 2004

Human uses level difference and time difference to get space information. Therefore this paper shows that method to presume direction of sound source by time difference and to mark presumed position. The position means direction from geometrical center of sensors to the sound source. To get the time difference of microphones input level, we will be explained about arrangement of microphones which used for the sensor to take the sound signal. It is included distance among the 3 microphones and distance between microphones and sound source. Secondly, input signals are transmitted to CPU througth digital process. CPU is used to DSP(Digital Signal Processor) for manage the signal by real time. Finally, the position of sound source is perceived by an explained algorithm in this paper.

• 한국해양공학회지
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• 제11권1호
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• pp.95-105
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• 1997

This paper presents a Inertial Measuring Unit(IMU) for motion measurement of an AUV. The IMU is composed of three parts: inertial sensors with three servo accelerometers and three rate gyros, an analog/digital interface board, and a signal processing board with TMS320C31 DSP processor. The IMU is a class of strap-down inwetial navigation system does not applicable directly to the navigation system in consequence of the AUV and integrated sensors for an integrated navigation system of the AUV. Fast calculstion of direction cosine matrix for the coordinate transformation body to reference is obtained through the DSP processor. A switching algotrithm is used to lessen the low frequency drift effect of the gyros in the vertical plane with use of low pass filtering of the signal of the accelerometers.

• Journal of Power Electronics
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• 제9권3호
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• pp.410-417
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• 2009

This paper represents a design and implementation of a digital controller for a multi-phase synchronous buck converter (SBC) using a digital signal processor (DSP). The multi-phase SBC has generally been used for a voltage regulation module (VRM) of a microprocessor because of its high current handling capability at a low output voltage. The VRM requires high control performance of tight output regulation, high slew rate, and load sharing capability of multiple converters. In order to achieve these requirements, the design and implementation of a digital control system for a multi-phase SBC are presented in this paper. The digital PWM generation, current sensing, and voltage and current controller using a DSP TMS320F2812 are considered. The experimental results are provided to show the validity of the implemented digital control system.

• 반도체디스플레이기술학회지
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• 제20권2호
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• pp.77-81
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• 2021

In this paper, a low-csst ECG system using a digital filter was implemented. After amplifying the analog ECG signal, it is converted into a digital signal and filtered. The developed ECG module is miniaturized by removing the analog filter element that occupies the existing volume and replacing it with a digital filter using a 3-stage Butterworth filter which is one of IIR filters. It uses a serial monitoring program with C# to check and save the ECG waveform measured on a computer screen. The ECG system using a developed digital filter in this paper uses a low-cost processor instead of an expensive, high-end processor, and its size and price are reduced by converting the analog filter to a digital filter. In addition, since the waveform of the developed ECG system is similar to the actual ECG waveform of MIT-BIU, it is considered that the existing analog filter can be replaced with the developed digital filter.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1988년도 한국자동제어학술회의논문집(국내학술편); 한국전력공사연수원, 서울; 21-22 Oct. 1988
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• pp.722-724
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• 1988

In this study, 8 ch. FECG signal storage system with general cassette recorder and amplifier is developed, and simulated LMS algorithm. In future we construct real time FECG monitor system that is used digital signal processor.

• 전자공학회논문지SC
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• 제40권3호
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• pp.93-98
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• 2003

디지털 신호처리기에 대한 성능향상과 더불어 레이더 펄스 압축기 또한 디지털 처리방식이 점점 일반화 되어가고 있다. 디지털 펄스압축기는 FIR(finite impulse response) 필터 알고리즘을 이용한 시간영역 처리방식 또는 FFT(fast Fourier transform) 알고리즘을 이용한 주파수영역 처리방식으로 구현될 수 있다. 본 논문에서는 다중 DSP(digital signal processor)론 이용하여 확장성이 용이한 디지털 펄스압축기를 구성하고, 아날로그 디바이스사의 ADSP-21060을 적용하여 수신 거리 셀 및 FIR 필터 탭(tap) 수에 따른 펄스압축 연산시간을 E-언어와 어셈블리 언어로 시간영역에서 비교·분석하였다. 분석결과를 적용함으로써, 레이더의 시스템 파라미터가 정해지는 경우 펄스압축기 구성에 소요되는 DSP 수를 쉽게 예측할 수 있음을 확인하였다.