• Proceedings of the KIEE Conference
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• 2006.04a
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• pp.330-332
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• 2006

A short distance laser range detector was developed on digital circuit. The circuit changed the analog circuit to digital circuit as possible as. The currently available laser range circuit one uses analog circuit mainly. But this ranger design targeted mass production with digital reporting function. So digital circuits replaced the analog circuit except amplifier and remained minor circuits those are hard to replace with digital circuit. The simulation shows that it is possible to make a reasonable distance measuring circuit on a digital circuit for very low price compare to analog circuit one.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.847-850
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• 1998

One of the most difficult problem of designing VLSI is a mixed-circuit design, that is to design circuit containing both analog parts and digital parts. Digital to analog converter and analog to digital converter is a typical case. Especially it can be a serious problem when mixed circuit are put into a large digital circuit like microcontroller. However nowadays this problem is settled by separating analog circuit parts outside the IC. This technique is based on converting a digital signal into a pulse sequence. Then an analog signal is obtained by averaging this pulse sequence at the external low-pass filter. An anlog to digital converter is designed using a stochastic logic instead of a traditional PWM (pulse-width modulation) signal and ins implemente dusing FPGa. Stochastic pulse sequence can be made as a simple circuits and moreover can be mathematically processed by simple circuits -AND gates. The spectral property of stochastic pulse sequence method is better than that of PWM method. So it make easy to design a external low-pass filter. This technique has important advantages, especially the reduction of the ADC cost.

• Journal of Practical Engineering Education
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• v.9 no.1
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• pp.41-48
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• 2017

In this paper, we proposed a method for digital logic circuit control, through arduino device programming with digital outputs, to design a curriculum for basic digital logic circuit practices. Curricula for arduino device programming and digital logic circuit are essentially practiced in engineering departments of colleges or high schools in South Korea. However, actual practice course lacks the experimental examples of digital logic circuit combined with arduino device programming. Furthermore, actual practice course lacks the curriculum in that students design and test their own digital logic circuits with the less cost than the oscilloscope. Therefore, to solve these problems in this paper, we proposed a curriculum for basic digital logic circuit practices during one semester. In this curriculum, students control and experiment their own digital logic circuits through arduino device programming with digital outputs.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.9 no.1
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• pp.89-94
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• 2009

This paper proposes the algorithms that design the highly digital logic circuit and assign the code to each node of DCG(Directed Cyclic Graph) of length ${\zeta}$. The conventional algorithm have some problems, so this paper introduce the matrix equation from DCG of length ${\zeta}$ and proposes highly digital logic circuit design algorithms according to the DCG of length ${\zeta}$. Using the proposed circuit design algorithms in this paper, it become realized that was able to design from former algorithm. Also, making a comparison between the circuit using former algorithm and this paper's, we testify that proposed paper's algorithm is able to realize more optimized circuit design. According to proposed circuit design algorithm in this paper, it is possible to design current that DCG have natural number, so it have the following advantages, reduction of the circuit input/output digits, simplification of circuit composition, reduction of computation time and cost. And we show comparability and verification about this paper's algorithm.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2002.02a
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• pp.131-134
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• 2002

In this work, we have developed a systematic way of utilizing the basic design tools for superconductive electronics. This include WRSPICE, XIC, margin program, and L-meter. Since the high performance analog-to- digital converter can be built with Rapid Single Flux Quantum (RSFQ) logic circuits the development of superconductive analog-to-digital converter has attracted a lot of interests as one of the most prospective area of the application of Josephson Junction technology. One of the main advantages in using Rapid Single Flux Quantum logic in the analog-to-digital converter is the low voltage output from the Josephson junction switching, and hence the high resolution. To design an 1-bit analog-digital converter, first we have used XIC tool to compose a circuit schematic, and then studied the operational principle of the circuit with WRSPICE tool. Through this process, we obtained the proper circuit diagram of an 1-bit analog-digital converter circuit. Based on this circuit we performed margin calculations of the designed circuits and optimized circuit parameters. The optimized circuit was laid out as a mask drawing. Inductance values of the circuit layout were calculated with L-meter. Circuit inductors were adjusted according to these calculations and the final layout was obtained.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.333-336
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• 2001

This paper describes the design and implementation results of 40, 32, 24 and 16kbps ADPCM encoder and decoder circuit, based on the protocol CCITT G.726. We verified the ADPCM algorithm using C language and designed the RTL circuit with Verilog HDL. The circuit has been simulated by Verilog-XL, synthesized by Design Compiler and verified using Xilinx FPGA. Since the synthesized circuit includes a small number of gates, it is expected to be used as a core module in the digital voice and image processing SOC.

• Progress in Superconductivity and Cryogenics
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• v.4 no.1
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• pp.8-12
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• 2002

Since the high performance analog-to-digital converter can be built with Rapid Single Flux Quantum (RSFQ) logic circuits the development of superconductive analog-to-digital converter has attracted a lot of interests as one of the most prospective area of the application of Josephson Junction technology. One of the main advantages in using Rapid Sng1e Flux Quantum logic in the analog-to-digital converter is the low voltage output from the Josephson junction switching, and hence the high resolution. To design an analog-digital converter, first we have used XIC tool to compose a circuit schematic, and then studied the operational principle of the circuit with WRSPICE tool. Through this process, we obtained the proper circuit diagram of an 1-bit analog-digital converter circuit. The optimized circuit was laid out as a mask drawing. Inductance values of the circuit layout were calculated with L-meter.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.721-724
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• 2006

This paper presents a method of the constructing the digital logic switching functions and realizing the circuit design using partition techniques. First of all, we introduce the necessity, background and concepts of the partition design techniques for the digital logic systems. Next, we discuss the definitions that are used in this paper. For the purpose of the circuit design for the digital logic switching functions, we discuss the extraction of the partition functions. Also we describe the construction method of the building block, that is called the building block, based on each partition functions. And we apply the proposed method to the example, and we compare the results with the results of the earlier methods. In result, we describe the control functions, it means that we obtain the effective cost in the digital logic design for any other earlier methods.

• IEIE Transactions on Smart Processing and Computing
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• v.2 no.4
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• pp.248-254
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• 2013

The size and power consumption of digital circuits including the dimming circuit part will increase for high-performance solid state lighting (SSL) systems in the future. This study examined the low-power consumption of adiabatic dynamic CMOS logic (ADCL) due to the principles of adiabatic charging. Furthermore, the designed low-power ADCL digital pulse width modulation (PWM) was optimized for SSL dimming systems. For this purpose, an ADCL digital 3-bit PWM was optimized in two steps. In the first step, the architecture of the ADCL digital 3-bit PWM was miniaturized. In the second step, the clock cut-off circuit was designed and added to the ADCL PWM. As a result, compared to the original configuration, 60 transistors and 15 capacitors of ADCL digital 3-bit PWM were reduced for miniaturization. Moreover, the clock cut-off circuit, which controls wake-up and sleep mode of ADCL D-FFs, was designed. The power consumption of an optimized ADCL digital PWM for all bit patterns decreased by 54 %.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2012.10a
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• pp.441-442
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• 2012