• Journal of the Microelectronics and Packaging Society
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• v.23 no.2
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• pp.29-35
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• 2016

With the pace of rapid innovation in technology of IoT (Internet of Things) and smart devices, biometric technology becomes one of the most progressive industries. Recent trends in biometrics show most are focused on embedding biometric sensors in mobile devices for user authentication. Multifactor biometrics such as fingerprint, retina, voice, etc. are considering as identification system to provide users with services more secured and convenient. Here we, therefore, demonstrate some major technologies and market trends of mobile biometric technology with its concerns and issues.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2005.09a
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• pp.111-129
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• 2005

Pop provides OEMs and EMS with a platform to cost effectively expand options for logic + memory 3D integration - Expands device options by simplifying business logistics of stacking - Integration controlled at the system level to best match stacked combinations with system requirements - Eliminates margin stacking and expands technology reuse - Helps manage the huge cost impacts associated with increasing demand for multi media processing and memory. PoP is well timed to enable and leverage: - Mass customization of systems for different use (form, fit and function) requirements o Bband and apps processor + memory stack platforms - Logic transition to flip chip enables PoP size reduction o Area and height reduction. Industry standardization is progressing. Amkor provides full turn-key support for base package, memory package and full system integration.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.1
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• pp.65-73
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• 1999

Si-tip FEAs were fabricated by a lift-off based process and their operating properties were evaluated. The dependence of emission current on applied gate and anode voltages, maximum emission current, hysteresis phenomena, MOSFET-type curves, current fluctuation, light emission from the emitted electrons, and failure mechanism of the device were widely discussed based on the experimental results.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2000.10a
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• pp.195-201
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• 2000

Current Status: Good Electrical performance for high speed device, Solder joint reliability-Passed 1600 cycles for 4M SRAM(3.27mm DNP),-Passed 400 cycles for large die(5.71 mm DNP), Future Plan: Improving Board Level Reliability for large die size, Lead free solder evaluation.

• Journal of the Microelectronics and Packaging Society
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• v.8 no.1
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• pp.19-25
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• 2001

In this paper, the design and simulation results of IF frequency synthesizer section has been described. We has been used 0.8 $\mu\textrm{m}$ BiCMOS device and library of the AMS. IF frequency synthesizer section has been contained IF VCO, Phase Detector, Divide_by_8, Charge Pump and Loop Filter. IF frequency synthesizer has been shown operating voltage of 2.7~3.6 V, control voltage of 0.5~2.7 V and supply current of 11 mA. The measured results have been showed good agreement with the simulation results about supply current.

• Journal of the Microelectronics and Packaging Society
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• v.5 no.1
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• pp.111-118
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• 1998

본 연구에서는 차세대 집적회로 device의 배선재료로서 사용될 가능성이 높은 Cu 금속을 무전해 도금으로 증착시킨 후 집적회로 공정에 필요한 열적 안정성에 대하여 고찰하 였다. MOCVD방법으로 Si 기판위에 TaN 박막을 확산 방지막으로 증착시킨 다음 무전해도 금으로 Cu막을 증착시켜 Cu/TaN/Si 구조의 다층박막을 제조하여 H2 환원 분위기에서 열처 리시킴으로서 열처리 온도에 따른 Cu 박막의 특성과 확산방지막 TaN와의 계면반응 특성에 대하여 고찰하였다. 활성화 처리와 도금용액의 조절을 적절히 행함으로서 MOCVD TaN 박 막위에 적당한 접착력을 지닌 Cu 박막층을 무전해 도금법을 사용하여 성공적으로 증착시킬 수 있었다. XRD, SEM 분석결과에 의하면 H2 환원분위기에서 열처리시켰을겨우 35$0^{\circ}C$~ $600^{\circ}C$ 범위에서 결정립 성장이 일어나 Cu 박막의 미세구조 특성이 개선됨을 알수 있었다. 또한 XRD, AES 분석에 의하여 열처리 온도에 따른 계면반응 상태를 조사해본 결과 $650^{\circ}C$ 온도에서는 Cu 원자가 TaN 확산방지막을 통과하여 Si 기판내로 확산함으로서 계면에서 Cu-Si 중간화합물을 형성하였다.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.1
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• pp.35-43
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• 2017

The three-dimensional integrated circuit (3D-IC) is a general trend for the miniaturized and high-performance electronic devices. The through-silicon-via (TSV) is the advanced interconnection method to achieve 3D integration, which uses vertical metal via through silicon substrate. However, the TSV based 3D-IC undergoes severe thermo-mechanical stress due to the CTE (coefficient of thermal expansion) mismatch between via and silicon. The thermo-mechanical stress induces mechanical failure on silicon and silicon-via interface, which reduces the device reliability. In this paper, the thermo-mechanical reliability of TSV based 3D-IC is reviewed in terms of mechanical fracture, heat conduction, and material characteristic. Furthermore, the state of the art via-level and package-level design techniques are introduced to improve the reliability of TSV based 3D-IC.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.11a
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• pp.278-281
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• 2003

A new type of ultrasonic spray nozzle was fabricated with piezoelectric devices. The spray nozzle was designed for the chemicals dispersion in the water purification bath. The piezoelectric properties in ultrasonic spray nozzles were optimized for the better dispersion of chemicals for purification process. Ultrasonic spray nozzle was packaged in metal case with silicone resin for the water proof application.

• ETRI Journal
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• v.36 no.4
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• pp.617-624
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• 2014

Through-silicon via (TSV) technology provides much of the benefits seen in advanced packaging, such as three-dimensional integrated circuits and 3D packaging, with shorter interconnection paths for homo- and heterogeneous device integration. In TSV, a destructive cross-sectional analysis of an image from a scanning electron microscope is the most frequently used method for quality control purposes. We propose a quantitative evaluation method for TSV etch profiles whereby we consider sidewall angle, curvature profile, undercut, and scallop. A weighted sum of the four evaluated parameters, nominally total score (TS), is suggested for the numerical evaluation of an individual TSV profile. Uniformity, defined by the ratio of the standard deviation and average of the parameters that comprise TS, is suggested for the evaluation of wafer-to-wafer variation in volume manufacturing.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.05a
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• pp.224-233
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• 2002

A common YBCO powder has been made from a mixture of Y123 and Y211 that heated at different temperatures, respectively. The synthesis temperature of Y211 is lower than Y123. If Y211 has been heated as a synthesis temperature of Y123, a particle size of it may be very coarse. It exist as one of main defects for superconductor. But We simultaneously synthesize a YBCO(its composition is (Y123+0.4Y211)+$lwt%CeO_2$) using polymeric complex method. In the YBCO, the Y123 is synthesized lower temperature than other methodes, and its crystal structure is orthorombic. For measurement of these superconducting properties, we fabricated a YBCO single crystal. The manufactured YBCO single crystal is measured a magnetic distribution device using 0.5Tesla magnet and trapped magnet fields in it are 0.2Tesla.