• 제목/요약/키워드: design error

검색결과 5,330건 처리시간 0.028초

Frequency Tracking Error Analysis of LQG Based Vector Tracking Loop for Robust Signal Tracking

  • Park, Minhuck;Kee, Changdon
    • Journal of Positioning, Navigation, and Timing
    • /
    • 제9권3호
    • /
    • pp.207-214
    • /
    • 2020
  • In this paper, we implement linear-quadratic-Gaussian based vector tracking loop (LQG-VTL) instead of conventional extended Kalman filter based vector tracking loop (EKF-VTL). The LQG-VTL can improve the performance compared to the EKF-VTL by generating optimal control input at a specific performance index. Performance analysis is conducted through two factors, frequency thermal noise and frequency dynamic stress error, which determine total frequency tracking error. We derive the thermal noise and the dynamic stress error formula in the LQG-VTL. From frequency tracking error analysis, we can determine control gain matrix in the LQG controller and show that the frequency tracking error of the LQG-VTL is lower than that of the EKF-VTL in all C/N0 ranges. The simulation results show that the LQG-VTL improves performance by 30% in Doppler tracking, so the LQG-VTL can extend pre-integration time longer and track weaker signals than the EKF-VTL. Therefore, the LQG-VTL algorithm is more robust than the EKF-VTL in weak signal environments.

원자력 발전소 주제어실 인터페이스 설계를 위한 인적오류 분석 기법의 보완 (A Modification of Human Error Analysis Technique for Designing Man-Machine Interface in Nuclear Power Plants)

  • 이용희;장통일;임현교
    • 대한인간공학회지
    • /
    • 제22권1호
    • /
    • pp.31-42
    • /
    • 2003
  • This study describes a modification of the technique for human error analysis in nuclear power plants (NPPs) which adopts advanced Man-Machine Interface (MMI) features based on computerized working environment, such as LCOs. Flat Panels. Large Wall Board, and computerized procedures. Firstly, the state of the art on human error analysis methods and efforts were briefly reviewed. Human error analysis method applied to NPP design has been THERP and ASEP mainly utilizing Swain's HRA handbook, which has not been facilitated enough to put the varied characteristics of MMI into HRA process. The basic concepts on human errors and the system safety approach were revisited, and adopted the process of FMEA with the new definition of Error Segment (ESJ. A modified human error analysis process was suggested. Then, the suggested method was applied to the failure of manual pump actuation through LCD touch screen in loss of feed water event in order to verify the applicability of the proposed method in practices. The example showed that the method become more facilitated to consider the concerns of the introduction of advanced MMI devices, and to integrate human error analysis process not only into HRA/PRA but also into the MMI and interface design. Finally, the possible extensions and further efforts required to obtain the applicability of the suggested method were discussed.

광학식 디스크를 위한 Reed Solomon 복호기 설계 (Design of Reed Solomon Decoder for Optical Disks)

  • 김창훈;박성모
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
    • /
    • pp.262-265
    • /
    • 2000
  • This paper describes design of a (32, 28) Reed Solomon decoder for optical compact disk provides double error detecting and correcting capability. The most complex circuit in the RS decoder is part for solving the error location numbers from error location polynomial, and the circuit has great influence on overall decoder complexity. We use RAM based architecture with Euclid algorithm, Chien search algorithm and Forney algorithm. We have developed VHDL model and Performed logic synthesis using the SYNOPSYS CAD tool. Then, the RS decoder has been implemented with FPGA. The total umber of gate is about 11,000 gates and it operates at 20MHz.

  • PDF

Triple Error Correcting Reed Solomon Decoder Design Using Galois Subfield Inverse Calculator And Table ROM

  • An Hyeong-Keon;Hong Young-Jin
    • 한국통신학회논문지
    • /
    • 제31권1C호
    • /
    • pp.8-13
    • /
    • 2006
  • A new RS(Reed Solomon) Decoder design method, using Galois Subfield GF($2^4$) Multiplier, is described. The Decoder is designed using Normalized error position stored ROM. Here New Inverse Calculator in GF($2^8$) is designed, which is simpler and faster than the classical GF($2^8$) direct inverse calculator, using the Galois Subfield GF($2^4$) Arithmatic operator.

최소자승오차 알고리즘을 이용한 2차원 FIR 디지털필터설계 (A Study on the Design of Two-Dimensional FIR Digital Filters using Least-Square Error Algorithm)

  • 구기준;조병하;이두수
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
    • /
    • pp.285-289
    • /
    • 1988
  • This paper suggests the way to improve the impulse response characteristics in 1-D and 2-D FIR digital filters design. The proposed a Least Square($L_2$) error algorithm of kaiser window is the better than $L_2$ error of the Remez Exchange(R.E.)algorithm.

  • PDF

CNC 밀링머신 이송장치의 오차유형 및 정상상태 오차해석에 의한 제어기 설계 (Controller Design by Error Shape and Steady-State Error Analysis for a Feed Drive System in CNC Milling Machine)

  • 이건복;길형균
    • 한국정밀공학회지
    • /
    • 제22권3호
    • /
    • pp.52-60
    • /
    • 2005
  • This paper deals with the position control fur a feed drive system in CNC milling machine, which utilizes a modified error signal for the elimination of steady-state error. A linear time-invariant (LTI) system has consistent properties in response to standard test signal inputs. Those also appear in an error curve acquired from the response. From such properties, constructed is an error model for the position control of the feed drive. And then added is the output of the error model to the current error signal. Consequently the resulting proportional control system brings performance improvement in view of the steady-state error. The effectiveness of the proposed scheme is confirmed through simulations and experiments.

고속국도에서의 연평균일교통량에 따른 N번째 고순위 시간교통량 추정모형 개발에 관한 연구 (Development of Nth Highest Hourly Traffic Volume Forecasting Models)

  • 오주삼
    • 한국도로학회논문집
    • /
    • 제9권3호
    • /
    • pp.13-20
    • /
    • 2007
  • 일반적으로 도로의 차로수 산출시에 30번째 혹은 100번째의 설계시간교통량을 활용하게 된다. 이러한 설계시간교통량은 설계시간계수에 연평균일교통량을 곱하여 산출하고 있다. 본 논문에서 고속국도에서 운영 중인 34개소의 상시교통량 조사 자료를 기초하여 연평균일교통량 5만대를 기준으로 하여 30번째와 100번째의 시간교통량을 추정할 수 있는 회귀모형을 각각 구축하였다. 30, 100번째 순위의 시간교통량의 추정능력을 평가지표 MAPE(Mean Absolute Percentage Error)를 활용하여 기존방법과 비교 평가했을 때, 30번째 시간교통량을 추정에서 5만대 이하 모형에서는 추정오차가 기존방법에 비해서 11.83% 감소하고 5만대 이상에서는 22.17% 감소하는 것으로 분석되었다. 또한 100번째 시간교통량 추정능력 평가에서는 5만대 이하일 때는 추정오차가 기존방법에 비해서 8.16%감소하고 5만대 이상에서는 15.25% 감소하는 것으로 평가되었다.

  • PDF

휴먼 에러 체크에 의한 구조설계 연구(II) (Check Models of Human Errors in Structural Design (II))

  • 손기상;안병준
    • 한국안전학회지
    • /
    • 제8권3호
    • /
    • pp.64-72
    • /
    • 1993
  • A large prropotion of structural failures are due to human error at the design stage of a structural engineering project, and many of these failures could have been prevented if there had been proper design checking. Analyses of the data from the 6 engineering firms and 24 professional engineer practitioners are shown on diagrams, also applicated for suggested models; overview checking. And then analyzed results of current work in this area, which examine the effects of error magnitude, are compared to the limit data obtained from the surveys. Overview checking only is analyzed of three typical design checking processes; self checking; Independent detailed checking, and overview checking.

  • PDF

An Optimum Design for First Order Fits to Correlated Responses

  • Bae, Wha-Soo
    • Journal of the Korean Statistical Society
    • /
    • 제25권4호
    • /
    • pp.557-566
    • /
    • 1996
  • The aim of this paper is to find a suitable design which minimizes the expected discrepancy: in fitting a first order model fearing quadratic terms as bias where there are more than two correlated responses. Kim and Draper(1994) discussed about choosing a design for straight line fits to two correlated responses The general case with r responses is examined here and the result is applied to a specific case to help understandings.

  • PDF

Modular Cell을 이용한 RS 디코더의 집적회로 설계

  • 임충빈;이광엽;이문기;김용석;홍현석;송동일;김영웅
    • 한국통신학회:학술대회논문집
    • /
    • 한국통신학회 1986년도 추계학술발표회 논문집
    • /
    • pp.92-102
    • /
    • 1986
  • In this paper, Modular cell approach was applied to custom IC design or RS decoder. For the design of RS decoder by modular cells, 3 basic cells and one extra circuit are designed, these are, SYN cell for syndrome calculation, AL cell for error locator polynomial calculation, and REM cell for remaining error transform calculation. RS decoder design by these basic cells is very simple and regular, and naturally suitable for VLSI RS decoder design.

  • PDF