• Genomics & Informatics
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• v.16 no.2
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• pp.22-29
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• 2018

Incorporation of unique barcodes into fission yeast gene deletion collections has enabled the identification of gene functions by growth fitness analysis. For fine tuning, it is important to examine barcode sequences, because mutations arise during strain construction. Out of 8,708 barcodes (4,354 strains) covering 88.5% of all 4,919 open reading frames, 7,734 barcodes (88.8%) were validated as high-fidelity to be inserted at the correct positions by Sanger sequencing. Sequence examination of the 7,734 high-fidelity barcodes revealed that 1,039 barcodes (13.4%) deviated from the original design. In total, 1,284 mutations (mutation rate of 16.6%) exist within the 1,039 mutated barcodes, which is comparable to budding yeast (18%). When the type of mutation was considered, substitutions accounted for 845 mutations (10.9%), deletions accounted for 319 mutations (4.1%), and insertions accounted for 121 mutations (1.6%). Peculiarly, the frequency of substitutions (67.6%) was unexpectedly higher than in budding yeast (~28%) and well above the predicted error of Sanger sequencing (~2%), which might have arisen during the solid-phase oligonucleotide synthesis and PCR amplification of the barcodes during strain construction. When the mutation rate was analyzed by position within 20-mer barcodes using the 1,284 mutations from the 7,734 sequenced barcodes, there was no significant difference between up-tags and down-tags at a given position. The mutation frequency at a given position was similar at most positions, ranging from 0.4% (32/7,734) to 1.1% (82/7,734), except at position 1, which was highest (3.1%), as in budding yeast. Together, well-defined barcode sequences, combined with the next-generation sequencing platform, promise to make the fission yeast gene deletion library a powerful tool for understanding gene function.

• Journal of the Korean Geotechnical Society
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• v.19 no.6
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• pp.169-179
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• 2003

Undrained shear strength of clay deposit is one of the most important properties in the design of geotechnical structures. The use of piezocone test is rapidly growing due to its merit that can measure the in-situ undrained shear strength continuously with less error. The reliability of the shear strength from piezocone test depends upon the cone factor applied. Many researchers have suggested different ranges of values for the factors. This study performs to find out the validity of the suggested values in Korea and their charateristics related to the mechanical properties of clay. Piezocone tests were performed at the site of pilot project of ground improvement at Yangsan-Mulgeum Gyeongnam to investigate the charateristics of piezocone factors. The piezocone fators$(N_{kt}, N_{ke}, N_{\Delta u})$ based on the undrained shear strength from quick triaxial compression test are generally within the suggested range. And there appears considerable relations between undrained shear strength and $(N_{kt}, N_{ke}, N_{\Delta u})$ and between preconsolidation pressure and $(N_{kt}, N_{ke})$, while plasticity index, rigidity index and friction ratio do not show any relations with cone factors. The results also reveal that factor $(N_{\Delta u})$ shows higher reliability than factors $(N_{kt} and N_{ke})$, which show smaller standard deviation, breadth of change and scattering.

• Transactions on Electrical and Electronic Materials
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• v.11 no.6
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• pp.261-265
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• 2010

In this paper, we attempt to improve the electrical characteristics of epoxy resin at high temperature (above $80^{\circ}C$) by adding magnesium oxide (MgO), which has high thermal conductivity. Scanning electron microscopy (SEM) of the dispersion of specimens with added MgO reveals that they are evenly dispersed without concentration. The dielectric breakdown characteristics of $SiO_2$ and MgO nanocomposites are tested by measurements at different temperatures to investigate the filler's effect on the dielectric breakdown characteristics. The dielectric breakdown strength of specimens with added $SiO_2$ decreases slowly below $80^{\circ}C$ (low temperature) but decreases rapidly above $80^{\circ}C$ (high temperature). However, the gradient of the dielectric breakdown strength of specimens with added MgO is slow at both low and high temperatures. The dielectric breakdown strength of specimens with 0.4 wt% $SiO_2$ is the best among the specimens with added $SiO_2$, and that of specimens with 3.0 wt% and 5.0 wt% MgO is the best among those with added MgO. Moreover, the dielectric strength of specimens with 3.0 wt% MgO at high temperatures is approximately 53.3% higher than that of specimens with added $SiO_2$ at $100^{\circ}C$, and that of specimens with 5.0 wt% of MgO is approximately 59.34% higher under the same conditions. The dielectric strength of MgO is believed to be superior to that of $SiO_2$ owing to enhanced thermal radiation because the thermal conductivity rate of MgO (approximately 42 $W/m{\cdot}K$) is approximately 32 times higher than that of $SiO_2$ (approximately 1.3 $W/m{\cdot}K$). We also confirmed that the allowable breakdown strength of specimens with added MgO at $100^{\circ}C$ is within the error range when the breakdown probability of all specimens is 40%. A breakdown probability of up to 40% represents a stable dielectric strength in machinery and apparatus design.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.4
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• pp.1-9
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• 2009

In this paper, a small area 12-bit 300MSPS CMOS Digital-to-Analog Converter(DAC) is proposed for display systems. The architecture of the DAC is based on a current steering 6+6 segmented type, which reduces non-linearity error and other secondary effects. In order to improve the linearity and glitch noise, an analog current cell using monitoring bias circuit is designed. For the purpose of reducing chip area and power dissipation, furthermore, a noble self-clocked switching logic is proposed. To verify the performance, it is fabricated with $0.13{\mu}m$ thick-gate 1-poly 6-metal N-well Samsung CMOS technology. The effective chip area is $0.26mm^2$ ($510{\mu}m{\times}510{\mu}m$) with 100mW power consumption. The measured INL (Integrated Non Linearity) and DNL (Differential Non Linearity) are within ${\pm}3LSB$ and ${\pm}1LSB$, respectively. The measured SFDR is about 70dB, when the input frequency is 15MHz at 300MHz clock frequency.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.39 no.3
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• pp.18-31
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• 2002

In this study, we introduce a concept of advanced neurofuzzy polynomial networks(ANFPN), a hybrid modeling architecture combining neurofuzzy networks(NFN) and polynomial neural networks(PNN). These networks are highly nonlinear rule-based models. The development of the ANFPN dwells on the technologies of Computational Intelligence(Cl), namely fuzzy sets, neural networks and genetic algorithms. NFN contributes to the formation of the premise part of the rule-based structure of the ANFPN. The consequence part of the ANFPN is designed using PNN. At the premise part of the ANFPN, NFN uses both the simplified fuzzy inference and error back-propagation learning rule. The parameters of the membership functions, learning rates and momentum coefficients are adjusted with the use of genetic optimization. As the consequence structure of ANFPN, PNN is a flexible network architecture whose structure(topology) is developed through learning. In particular, the number of layers and nodes of the PNN are not fixed in advance but is generated in a dynamic way. In this study, we introduce two kinds of ANFPN architectures, namely the basic and the modified one. Here the basic and the modified architecture depend on the number of input variables and the order of polynomial in each layer of PNN structure. Owing to the specific features of two combined architectures, it is possible to consider the nonlinear characteristics of process system and to obtain the better output performance with superb predictive ability. The availability and feasibility of the ANFPN are discussed and illustrated with the aid of two representative numerical examples. The results show that the proposed ANFPN can produce the model with higher accuracy and predictive ability than any other method presented previously.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.83-89
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• 2006

This paper describes the design of I/Q channel 12bit Digital-to-Analog Converter(DAC) which shows the conversion rate of 120MHz and the power supply of 3.3V with 0.35um CMOS n-well 1-poly 4-metal process for advanced wireless transceiver. The proposed DAC utilizes 4-bit thermometer decoder with 3 stages for minimum glitch energy and linearity error. Also, using a optimized 4bit thermometer decoder for the decrement of the chip area. Integral nonlinearity(INL) of ${\pm}1.6LSB$ and differential nonlinearity(DNL) of ${\pm}1.3LSB$ have been measured. In single tone test, the ENOB of the proposed 12bit DAC is 10.5bit and SFDR of 73dB(@ Fs=120MHz, Fin=1MHz) is measured, respectively. Dual-tone test SFDR is 61 dB (@ Fs=100MHz, Fin=1.5MHz, 2MHz). Glitch energy of 31 pV.s is measured. The converter consumes a total of 105mW from 3.3-V power supply.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.5
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• pp.486-492
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• 2004

In this paper, we newly propose the binary CA-CDMA(constant amplitude CDMA) system using pre-coding method to solve the high PAPR problem caused by multi-user signal transmission in the CDMA system. 4-user CA-CDMA, the basis of proposed binary CA-CDMA system, makes binary output signal for 4 input users. It produces the output of binary(${\pm}$2) amplitude by using a parity signal resulting from the XOR operation of 4 users data. Another sub-channel or more bandwidth is not necessary because it is transmitted together with user data and can be easily recovered in the receiver. The extension of the number of users can be possible by the simple repetition of the basic binary 4-user CA-CDMA. For example, binary 16-user CA-CDMA is made easily by allocating the four 4-user CA-CDMA systems in parallel and leading the four outputs to the fifth 4-user CA-CDMA system as input, because the output signal of each 4-user CA-CDMA is also binary. By the same extension procedure, binary 64 and 256-user CA-CDMA systems can be made with the constant amplitude. As a result, the code rate of this proposed CA-CDMA system is just 1 and binary CA-CDMA does not change the transmission rate with the constant output signal(PAPR = 0 ㏈). Therefore, the power efficiency of the HPA can be maximized without the nonlinear distortion. From the simulation results, it is verified that the conventional CDMA system has multi-level output signal, but the proposed binary CA-CDMA system always produces binary output. And it is also found that the BER of conventional CDMA system is increased by nonlinear HPA, but the BER of proposed binary CA-CDMA system is not changed.

• Applied Chemistry for Engineering
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• v.29 no.5
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• pp.510-518
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• 2018

Recently, lots of interests have been concentrated on the scrubber system that abates waste gases produced from semiconductor manufacturing processes. An effective design of the thermal decomposition reactor inside a scrubber system is significantly important since it is directly related to the removal performance of pollutants and overall stabilities. In the present study, a computational fluid dynamics (CFD) analysis was conducted to figure out the thermal and flow characteristics inside the reactor of wet scrubber. In order to verify the numerical method, the temperature at several monitoring points was compared to that of experimental results. Average error rates of 1.27~2.27% between both the results were achieved, and numerical results of the temperature distribution were in good agreement with the experimental data. By using the validated numerical method, the effect of the reactor geometry on the heat transfer rate was also taken into consideration. From the result, it was observed that the flow and temperature uniformity were significantly improved. Overall, our current study could provide useful information to identify the fluid behavior and thermal performance for various scrubber systems.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.19 no.4
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• pp.81-99
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• 2020

Origin-destination data have been collected and utilized for demand analysis and service design in various fields such as public transportation and traffic operation. As the utilization of big data becomes important, there are increasing needs to store raw origin-destination data for big data analysis. However, it is not practical to store and analyze the raw data for a long period of time since the size of the data increases by the power of the number of the collection points. To overcome this storage limitation and long-period pattern analysis, this study proposes a methodology for compression and origin-destination data analysis with the compressed data. The proposed methodology is applied to public transit data of Sejong and Seoul. We first measure the reconstruction error and the data size for each truncated matrix. Then, to determine a range of principal components for removing random data, we measure the level of the regularity based on covariance coefficients of the demand data reconstructed with each range of principal components. Based on the distribution of the covariance coefficients, we found the range of principal components that covers the regular demand. The ranges are determined as 1~60 and 1~80 for Sejong and Seoul respectively.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.3 s.333
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• pp.25-32
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• 2005

In this papers, we first, therefore, designed VCO(voltage controlled oscillator) that is composed of the dielectric resonator and the varactor diode, and then designed and fabricated PLDRO(phase locked dielectric resonator oscillator) that is combined with the sampling phase detector and loop filter. The measured results of the fabricated PLDRO at 12.05 [GHz] show the output power is 13.54 [dBm], frequency tuning range approximately +/- 7.5 [MHz], and Power variation over the tuning range less than 0.2 [dB], respectively. The phase noise which effects on bits error rate in digital communication is obtained with -114.5 [dBc/Hz] at 100 [KHz] offset from carrier, and The second harmonic suppression is less than -41.49 [dBc]. These measured results are found to be more improved than those of VCO without adopting PLL, and the phase noise and power variation performance characteristics show the better performances than those of conventional PLL.