• Journal of Convergence for Information Technology
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• v.10 no.10
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• pp.1-8
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• 2020

The need for storage, management, and retrieval techniques for alternative data has emerged as technologies based on data generated from business activities conducted by enterprises have emerged as the key to business success in recent years. Existing big data platform systems must load a large amount of data generated in real time without delay to process unstructured data, which is an alternative data, and efficiently manage storage space by utilizing a deduplication system of different storages when redundant data occurs. In this paper, we propose a multi-layer distributed data deduplication process system using the similarity of the Cuckoo hashing filter technique considering the characteristics of big data. Similarity between virtual machines is applied as Cuckoo hash, individual storage nodes can improve performance with deduplication efficiency, and multi-layer Cuckoo filter is applied to reduce processing time. Experimental results show that the proposed method shortens the processing time by 8.9% and increases the deduplication rate by 10.3%.

• The Transactions of the Korea Information Processing Society
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• v.7 no.8
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• pp.2484-2496
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• 2000

High speed switches have been developing to interconnect a large number of nodes. It is important to analyze the switch performance under various conditions to satisfy the requirements. Queueing analysis, in general, has the intrinsic problem of large state space dimension and complex computation. In fact, The petri net is a graphical and mathematical model. It is suitable for various applications, in particular, manufacturing systems. It can deal with parallelism, concurrence, deadlock avoidance, and asynchronism. Currently it has been applied to the performance of computer networks and protocol verifications. This paper presents a framework for modeling and analyzing ATM switch using stochastic activity networks (SANs). In this paper, we provide the ATM switch model using SANs to extend easily and an approximate analysis method to apply A TM switch models, which significantly reduce the complexity of the model solution. Cell arrival process in output-buffered Queueing A TM switch with finite buffer is modeled as Markov Modulated Poisson Process (MMPP), which is able to accurately represent real traffic and capture the characteristics of bursty traffic. We analyze the performance of the switch in terms of cell-loss ratio (CLR), mean Queue length and mean delay time. We show that the SAN model is very useful in A TM switch model in that the gates have the capability of implementing of scheduling algorithm.

• Journal of the Korea Concrete Institute
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• v.25 no.3
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• pp.295-304
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• 2013

Ultra-High Performance Concrete (UHPC) has recently been one of the most active research fields in Korea as well as in foreign countries, because it can contribute to a longer life and economic efficiency of structures. Although precast-type UHPC fabricated in a factory is preferable in terms of quality control and reduction of construction period, there exist, even in the precast structure, some parts that need to be cast in-place such as the joints between precast segments. In the cast-in-place UHPC, however, it is probable that an optimum curing condition can hardly be realized in contrast to the factory production. In this study, therefore, the trend of compressive strength development of UHPC was experimentally investigated by assuming various inferior curing conditions that may be anticipated at a construction site. Concrete specimens were fabricated and cured under different conditions with the variables such as curing temperature, delay time before the initiation of curing, duration of curing time and moisture condition. The strengths were compared with those of the specimens cured by standard high temperature steam. Through the analysis of the test results, some minimum requirements for curing have been proposed that are required when the UHPC is cast in-place. It is expected, through this study, that practical use of UHPC in construction sites can be increased.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.3
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• pp.89-101
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• 2014

Recently, as domestic air traffic dramatically increases, the need of ATC(air traffic control) systems has grown for safe and efficient ATM(air traffic management). Especially, for smooth ATC, it is far more important that performance of display system which should show all air traffic situation in FIR(Flight Information Region) without additional latency is guaranteed. In this paper, we design a ASTERIX(All purpose STructured Eurocontrol suRveillance Information eXchange) parsing module to promote stable ATC by minimizing system loads, which is connected with reducing overheads arisen when we parse ASTERIX message. Our ASTERIX parsing module based on pattern matching creates patterns by analyzing received ASTERIX data, and handles following received ASTERIX data using pre-defined procedure through patterns. This module minimizes display errors by rapidly extracting only necessary information for display different from existing parsing module containing unnecessary parsing procedure. Therefore, this designed module is to enable controllers to operate stable ATC. The comparison with existing general bit level ASTERIX parsing module shows that ASTERIX parsing module based on pattern matching has shorter processing delay, higher throughput, and lower CPU usage.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.5
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• pp.445-453
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• 2016

This paper presents the implementation and design of the 1T-1R wireless HD video streaming systems over 28 GHz mmWave frequency using 3GPP LTE-TDD standard on NI USRP RIO SDR platform. The baseband of the system uses USRP RIO that are stored in Xilinx Kintex-7 chip to implement LTE-TDD transceiver modem, the signal that are transceived from USRP RIO up or down converts to 28 GHz by using self-designed 28 GHz RF transceiver modules and it is finally communicated HD video data through self-designed $4{\times}8$ sub array antennas. It is that communication method between USRP RIO and Host PC use PCI express ${\times}4$ to minimize delay of data to transmit and receive. The implemented system show high error vector magnitude performance above 25.85 dBc and to transceive HD video in experiment environment anywhere.

• Fire Science and Engineering
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• v.15 no.1
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• pp.1-6
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• 2001

In this study, reduced-scale experiments were conducted to understand smoke movements in tunnel fires with the natural ventilation. The 1/20 scale experiments were conducted under the Froude scaling since the smoke movement in tunnels is governed by buoyancy force. Three cases of experiments, in which a natural vent location varied from 1 m, 2 m and 3 m from the fire source symmetrically, were conducted in order to evaluate the effect of the position of ventilation systems on smoke movement. In case of a poo1 whose diameter is 4.36 cm, the temperature of smoke layer passed through the vent was maintained 7~$8^{\circ}c$ less than that of smoke layer without a vent. In case of a pool whose diameter is 5.23 cm, the average velocity passed through the vent was decreased when it was close to the fire source. And the maximum delay time was 3.86s. In CASE 1, the ceiling temperature was decreased by approximately 8$^{\circ}C$ and the vertical temperature was decreased by approximately $7^{\circ}c$. In CASE 2, both ceiling and vertical temperature wert decreased by $3^{\circ}c$ and in CASE 3, they were decreased by $2^{\circ}c$ each. It was confirmed that the thickness of smoke layer was maintained uniformly under the 25% height of tunnel through the visualized smoke flow by a laser sheet and the digital camcoder.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.6
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• pp.188-198
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• 2013

In order to increase its performance, NAND flash memory-based storage is composed of data buses that are shared by a number of flash memories and uses a parallel technique that can carry out multiple flash memory operations simultaneously. Since the storage performance is strongly influenced by the performance of each data bus, it is important to improve the utilization of the bus by ensuring effective scheduling of operations by the storage controller. However, this is difficult because of dynamic changes in buses due to the unique characteristics of each operation with different timing, cost, and usage by each bus. Furthermore, the scheduling technique for increasing bus utilization may cause unanticipated operation delay and wastage of storage resource. In this study, we suggest various dynamic operation scheduling techniques that consider data bus performance and storage resource efficiency. The proposed techniques divide each operation into three different stages and schedule each stage depending on the characteristics of the operation and the dynamic status of the data bus. We applied the suggested techniques to the controller and verified them on the FPGA platform, and found that program operation decreased by 1.9% in comparison to that achieved by a static scheduling technique, and bus utilization and throughput was approximately 4-7% and 4-19% higher, respectively.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.12
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• pp.99-108
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• 2015

The embedded microcontroller which is operated by the logic gates synchronized on the clock pulse, is gradually used as main controller of mission-critical systems. Severe electrical situations such as high voltage/frequency surge may cause malfunctioning of the clock source. The tolerant system operation is required against the various external electric noise and means the robust design technique is becoming more important issue in system clock failure problems. In this paper, we propose on-chip backup clock change architecture for the automatic clock failure detection. For the this, we adopt the edge detector, noise canceller logic and glitch-free clock changer circuit. The implemented edge detector unit detects the abnormal low-frequency of the clock source and the delay chain circuit of the clock pulse by the noise canceller can cancel out the glitch clock. The externally invalid clock source by detecting the emergency status will be switched to back-up clock source by glitch-free clock changer circuit. The proposed circuits are evaluated by Verilog simulation and the fabricated IC is validated by using test equipment electrical field radiation noise

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.12
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• pp.89-98
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• 2015

This paper provides a robust and non-fragile $H_{\infty}$ controller design algorithm for time-delayed systems with randomly occurring polytopic uncertainties and disturbances. First, we design time-delayed system considering randomly occurring uncertainties and disturbances. Next, The sufficient condition for the existence of robust and non-fragile $H_{\infty}$ controller is presented by LMI(linear matrix inequality) using Lyapunov stability analysis and $H_{\infty}$ performance measure. Since the obtained condition can be expressed as a PLMI(parameterized linear matrix inequality) by changes of variables and Schur complement, all solutions including controller gain, degrees of controller satisfying non-fragility, $H_{\infty}$ norm bound ${\gamma}$ can be calculated simultaneously. Finally, numerical examples are given to illustrate the performance and the effectiveness of the proposed robust and non-fragile $H_{\infty}$ controller compared with the deterministic uncertainty model even though there exists randomly occurring uncertainties, disturbances and time delays.

• THE INTERNATIONAL COMMERCE & LAW REVIEW
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• v.62
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• pp.3-32
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• 2014

Article 77 sets forth the principle of prevention applied in several legal systems. Under this principle the party threatened by ooss as a consequence of a breach of contract by the other party is not permitted to await passively incurrence of the loss and then sue for damages. He is obliged to take adequate preventive measures to mitigate his loss. If the injured party abstains from taking such excessive measures he will not be considered to have failed to mitigate the loss under Article 77. The sanction provided in Article 77 against a party who fails to mitigate his loss only enables the other party to claim reduction in the damages. The reduction in damages under Article 77 is equal to the amount by which the loss should have been mitigated if the injured party had taken reasonable measures to avert or to lessen it. The aim of Article 77 is to encourage mitigation of the loss. The duty to mitigate the loss applies not only to a breach of contract in respect of an obligation whose performance is currently due. but also to an anticipatory breach of contract under Article 71. Article 85 contemplates that the buyer is in delay in fulfilling the latter obligation, or else that he fails to pay the price when payment is to be made concurrently with delivery of the goods by the seller. In both these situations of default, the seller who is either in possession of the goods or otherwise able to control their disposition must take measures, reasonable in the circumstances, to preserve them. The right of retention of the goods y the seller exists until he is reimbursed by the other party for the reasonable expenses incurred. Article 87 and Article 88 of the Convention grant different rights to the party obligated to take steps to preserve the goods; Article 87 allows him to deposit them in the warehouse of a third person, and Article 88 to sell them by whatever means appropriate. A difference exists between paragraph Article 88 (1) which grants the right to sell, and paragraph (2) which imposes the duty to take reasonable measures to sell the goods.