• Journal of Electrical Engineering and information Science
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• v.3 no.3
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• pp.300-305
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• 1998

This paper describes new sense amplifier with fast sensing delay time of 0.54ns and 32kb CMOS embedded SRAM with 4.67 ns access time for a 3-V power supply. It was achieved using the sense amplifier with multiple point sensing scheme and highs peed bit-line scheme. The sense amplifier saves 25% of the power dissipation compared with the conventional one while maintaining a very short sensing delay. The SRAM uses 0.5m double-polysilicon and triple-metal CMOS process technology. A die size is 1.78${\times}$mm2.13mm.

• Proceedings of the KSRS Conference
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• 2002.10a
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• pp.216-221
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• 2002

A spherical Earth surface is used fur realistic analysis of the geometrical performance characteristics about the variation of satellite altitude and 2-dimensional line-of-sight(LOS) tilt angle in a satellite imager using Time Delay and Integration(TDI) technique with fixed integration time. In the spherical Earth surface model TDI synchronization using LOS tilt is investigated as a solution to compensate geometric performance degradation due to altitude decrease. This result can be used fur a TDI CCD imager with variable integration time in a certain as well.

• Journal of Navigation and Port Research
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• v.26 no.3
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• pp.295-302
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• 2002

Currently digital communication system adapt various digital modulation schemes. All these communication systems are required to cause the minimum interference to adjacent channels, they must therefore employ the linear power amplifiers. In respect to linear power amplifiers, there are many linearization techniques. Feedforward power amplifier represent very wide bandwidth and high linearization capability. In the feedforward systems overall efficiency is reduced due to the loss of delay line. In this paper, delay filter instead of transmission delay line adapted to get more high efficiency. Experimental results showed that ACLR has improved 17.04dB which is added 2.54dB by using the delay filter.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.2
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• pp.144-149
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• 2004

Register Controlled DLL with fast locking and low-power consumption, is described in this paper. Delay monitor scheme is proposed to achieve the fast locking and inverter is inserted in front of delay line to reduce the power consumption, also. Proposed DLL was fabricated in a 0.6${\mu}{\textrm}{m}$ 1-poly 3-metal CMOS technology. The proposed delay monitor scheme enables the DLL to lock to the external clock within 4 cycles. The power consumption is 36㎽ with 3V supply voltage at 34MHz clock frequency.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.9
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• pp.46-55
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• 1992

This paper propose how to calculate the capacitance for VLSI interconnection lines in multi-dielectric layer. The proposed method is a expansive form of 3-dimensional direct intergral method developed in single-dielectric layer. We took into consideration the effect of multi-dielectric layer by using additional boundary condition instead of modified Green's function. It is used the potential equations in line surface and the electric field equations in dielectric interface as the boundary condition. RC delay time for interconnection line of multi-dielectric layer is obtained from the calculated capacitance value. At this time, we are used Al and WSiS12T as interconnection materials.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.10
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• pp.1061-1070
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• 2009

In this paper, we have designed TDL(True-time Delay Line) for eliminating beam-squint occurring in active phased array antenna with large electrical size operated in wide bandwidth, and have tested its electrical performance. The proposed TDL device is composed of 4-bit microstrip delay line structure and MMIC amplifier for compensation of the delay-line loss. The measured results of gain and phase versus delay state satisfy the electrical requirements, also P1dB output power and noise figure meet the requirement. To verify the performance of fabricated TDL, we have simulated the beam patterns of wide-band active phased array antenna using the measured results and have certified the beam pattern compensation performance. As a result of simulated beam pattern compensation with respect to the 675.8 mm size antenna which is operated in X-band, 800 MHz bandwidth, we have reduced the beam squint error of ${\pm}1^{\circ}$ with ${\pm}0.1^{\circ}$. So this TDL module is able to be applied to active phase array antenna system.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.40 no.7
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• pp.261-272
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• 2003

An Ethernet PON(Passive Optical Network) is an economical and efficient access network that has received significant research attention in recent years. A MAC(Media Access Control) protocol of PON , the next generation access network, is based on TDMA(Time Division Multiple Access) basically and can classify this protocol into a fixed length slot assignment method suitable for leased line supporting QoS(Quality of Service) and a variable length slot assignment method suitable for LAN/MAN with the best effort. For analyzing the performance of these protocols, we design an Ethernet PON model using OPNET tool. To establish the maximum efficiency of a network, we verify a MAC protocol and determine the optimal number of ONUs(Optical Network Unit) that can be accepted by one OLT(Optical Line Terminal) and propose the suitable buffer size of ONU based on analyzing the end-to-end Ethernet delay, queuing delay, throughput, and utilization.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.1
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• pp.42-49
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• 2016

In this paper, we design and fabricate an instantaneous frequency measurement receiver with a frequency resolution of 125 MHz which detects and measures continuous signals in 4~6 GHz using path difference of delay lines. The receiver has a 4-bit configuration and consists of power dividers, delay lines, power combiners, power detectors, voltage comparator circuits and so on. The accuracy of the instantaneous frequency measurement is improved by applying offset voltage compensation to the comparator circuits to compensate the frequency-dependent path loss of the delay line and the frequency dependence of power detection.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.1
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• pp.116-123
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• 2000

This paper presents a linearizer using the feedforward loop which can be applied to PCS base-station applications. This linearizer used a IM amplifier and an auxiliary amplifier in order to remove delay lines used in the predistortor using the feedforward technique. The delay line in error loop is changed by the main power amplifier(PA) and the error amplifier is utilized to amplify the error signal which fed to the output of main amplifier. The linearizer was simulated by HP ADS ver 1.1 and fabricated on GML 1000 with thickness of 0.8 mm and dielectric constant of 3.2. Two-tone signals at 1.85 GHz and 1.851 GHz with -7dBm/tone from synthesizers are injected into the main PA. The main PA with a 27 dB gain and a $P_{1dB}$ of 29 dBm(two-tone) was utilized. The reduction of intermodulation distortion (IMD) is around 17 dB.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.327-332
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• 2003

A new discretization method for nonlinear system with time-delay is proposed. It is based on the well-known Taylor series expansion and the zero-order hold (ZOH) assumption. We know that a discretization of linear system can be obtained with the ZOH assumption and within the sampling interval. A similar line of thinking is available in nonlinear case. The mathematical structure of the new discretization method is explored and under the structure, the sampled-data representation of nonlinear system including time-delay is computed. Provided that the discrete form of the single input nonlinear system with time-delay is derived, this result is easily extended to nonlinear system with multi-input time-delay. For simplicity two inputs are considered in this study. It is enough to generalize that of multiple inputs. Finally, the time-discretization of non-affine nonlinear system with time-delay is investigated for apply all nonlinear system