• Title/Summary/Keyword: decimations

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New Decimations of Binary Sequences with 4-Valued Cross-Correlations (상호상관 함숫값이 4개인 이진수열의 새로운 데시메이션)

  • Kwon, Sook-Hee;Cho, Sung-Jin;Kwon, Min-Jeong;Kim, Han-Doo;Choi, Un-Sook;Kim, Jin-Gyoung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.3
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    • pp.627-633
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    • 2013
  • An important problem in the transmission performance and efficiency is to find the values and the number of the cross-correlation function between two different maximal sequences. In this paper, we present the new maximal sequences which are obtained by the new decimations $d=\frac{2^{m-st-1}}{2^s-1}(2^n+2^{st+s+1}-2^{m+st+1}-1)$ from some maximal sequences. We will also find the values and the number of occurrences of each value of the cross-correlation function from the proposed decimations.

New decimations with 5-level cross-correlation and large linear span (5값 상호상관함숫값과 높은 선형스팬을 갖는 새로운 데시메이션들)

  • Kim, Jin-Gyoung;Cho, Song-Jin;Kim, Han-Doo;Choi, Un-Sook
    • The Journal of the Korea institute of electronic communication sciences
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    • v.8 no.2
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    • pp.263-269
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    • 2013
  • In this paper we give a proof for finding the values of the cross-correlation function $C_d({\tau})$, when $d=3{\cdot}2^m-2$ where n=2m, m=4k ($k{\geq}2$). And the linear span of the sequences in the proposed sequence family are derived in the some cases.

A New Family of Nonlinear Binary Sequences Generated by Two m-Sequences (두 개의 m-수열에 의해 생성된 새로운 비선형 이진수열군)

  • Choi, Un-Sook;Cho, Sung-Jin;Kim, Han-Doo;Kwon, Sook-Hee;Kwon, Min-Jeong;Kim, Jin-Gyoung
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.05a
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    • pp.228-231
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    • 2012
  • In this paper we propose a new family of nonlinear binary sequences generated by $m$-sequences for decimations $d=2^{k-1}(2^{s+1}-2^k+2^{k(i+1)}-2^{ki}-1)/(2^s-1)$ where $n=2k$, $i$ is odd and $s$ is such that $2s$ divides $k$. And we analyze the cross-correlation function between two $m$-sequences for new decimations $d$. Proposed sequences is extension of Rosendahl's sequnces and Dobbertin's sequences.

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New Decimations with 4-Valued Cross-Correlations (상호상관관계 함숫값이 4개인 새로운 데시메이션)

  • Kwon, Min-Jeong;Cho, Sung-Jin;Kwon, Sook-Hee;Kim, Jin-Gyoung;Kim, Han-Doo;Choi, Un-Sook
    • The Journal of the Korea institute of electronic communication sciences
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    • v.7 no.4
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    • pp.827-832
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    • 2012
  • In this paper, we present a new decimated Gold-like m-sequence with a binary m-sequence of period $2^n-1$. And we show that the cross-correlation function of the proposed sequence is four-valued.

A NEW PROOF ABOUT THE DECIMATIONS WITH NIHO TYPE FIVE-VALUED CROSS-CORRELATION FUNCTIONS

  • Kim, Han-Doo;Cho, Sung-Jin
    • Journal of applied mathematics & informatics
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    • v.30 no.5_6
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    • pp.903-911
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    • 2012
  • Let $\{u(t)\}$ and $\{u(dt)\}$ be two maximal length sequences of period $2^n-1$. The cross-correlation is defined by $C_d({\tau})=\sum{_{t=0}^{2^n-2}}(-1)^{u(t+{\tau})+v(t)$ for ${\tau}=0,1,{\cdots},2^n-2$. In this paper, we propose a new proof for finding the values and the number of occurrences of each value of $C_d({\tau})$ when $d=2^{k-2}(2^k+3)$, where $n=2k$, $k$ is a positive integer.

EEG signal display as a multirate sampling problem (멀티레이터 샘플링 문제로서의 뇌파신호 디스플레이)

  • Choi, H.G.;Oh, Y.S.;Lee, S.J.
    • Proceedings of the KOSOMBE Conference
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    • v.1996 no.05
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    • pp.311-314
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    • 1996
  • The display of biological signals in monitors often involves a multirate sampling operation which consists of decimation and intenolation. All electroencephalographic (EEG) samples of 10 to 30 seconds must be displayed in the computer screen to keep the aspect ratio of the paper polygraph output. Since the current affordable display technology plots at most 2,000 pixels per row, some samples need to be discarded. This paper studies methods to perform this operation characterizing them from the signal processing viewpoint and compares the display quality among several decimations. Experimental results show that a nonlinear operation such as the peak detection could be preferable than the canonical linear filtering to reduce aliasing.

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Four-Valued Cross-Correlation Function between Two Maximal Linear Recursive Sequences (최대 주기의 두 선형 순환 수열 사이의 4개의 값을 갖는 상호상관함수)

  • Choi, Un-Sook;Kim, Sung-Jin;Kim, Han-Doo
    • The Journal of the Korea institute of electronic communication sciences
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    • v.7 no.6
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    • pp.1369-1375
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    • 2012
  • One of important problems in the theory of sequences is to determine the values and number of occurrences of each value taken on by the cross-correlation. In this paper, we find the values and the number of occurrences of each value of cross-correlation between an m-sequence u(t) of period $2^n-1$ and its decimation $u(dt)(0{\leq}t{\leq}2^n-2)$ where n=2m, 2s|m and $d=(2^{2m}+2^{2s+1}-2^{m+s+1}-1)/(2^s-1)$. Also we show that a family of decimations leads to a four-valued cross-correlation.

Bit-serial Discrete Wavelet Transform Filter Design (비트 시리얼 이산 웨이블렛 변환 필터 설계)

  • Park Tae geun;Kim Ju young;Noh Jun rye
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.4A
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    • pp.336-344
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    • 2005
  • Discrete Wavelet Transform(DWT) is the oncoming generation of compression technique that has been selected for MPEG4 and JEPG2000, because it has no blocking effects and efficiently determines frequency property of temporary time. In this paper, we propose an efficient bit-serial architecture for the low-power and low-complexity DWT filter, employing two-channel QMF(Qudracture Mirror Filter) PR(Perfect Reconstruction) lattice filter. The filter consists of four lattices(filter length=8) and we determine the quantization bit for the coefficients by the fixed-length PSNR(peak-signal-to-noise ratio) analysis and propose the architecture of the bit-serial multiplier with the fixed coefficient. The CSD encoding for the coefficients is adopted to minimize the number of non-zero bits, thus reduces the hardware complexity. The proposed folded 1D DWT architecture processes the other resolution levels during idle periods by decimations and its efficient scheduling is proposed. The proposed architecture requires only flip-flops and full-adders. The proposed architecture has been designed and verified by VerilogHDL and synthesized by Synopsys Design Compiler with a Hynix 0.35$\mu$m STD cell library. The maximum operating frequency is 200MHz and the throughput is 175Mbps with 16 clock latencies.