• Journal of KIISE:Databases
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• v.33 no.7
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• pp.693-707
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• 2006

To improve performance using a multidimensional index in similar sequence matching, we transform a high-dimensional sequence to a low-dimensional sequence, and then construct a low-dimensional MBR that contains multiple transformed sequences. In this paper we propose a formal method that transforms a high-dimensional MBR itself to a low-dimensional MBR, and show that this method significantly reduces the number of lower-dimensional transformations. To achieve this goal, we first formally define the new notion of MBR-safe. We say that a transform is MBR-safe if a low-dimensional MBR to which a high-dimensional MBR is transformed by the transform contains every individual low-dimensional sequence to which a high-dimensional sequence is transformed. We then propose two MBR-safe transforms based on DFT and DCT, the most representative lower-dimensional transformations. For this, we prove the traditional DFT and DCT are not MBR-safe, and define new transforms, called mbrDFT and mbrDCT, by extending DFT and DCT, respectively. We also formally prove these mbrDFT and mbrDCT are MBR-safe. Moreover, we show that mbrDFT(or mbrDCT) is optimal among the DFT-based(or DCT-based) MBR-safe transforms that directly convert a high-dimensional MBR itself into a low-dimensional MBR. Analytical and experimental results show that the proposed mbrDFT and mbrDCT reduce the number of lower-dimensional transformations drastically, and improve performance significantly compared with the $na\"{\i}ve$ transforms. These results indicate that our MBR- safe transforms provides a useful framework for a variety of applications that require the lower-dimensional transformation of high-dimensional MBRs.

• The KIPS Transactions:PartA
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• v.18A no.2
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• pp.39-44
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• 2011

This paper proposes the new high-performance circuit architecture of the transform and quantization for unified video CODEC. The proposed architecture can be applied to all kinds of transforms and quantizations for the video compression standards such as JPEG, MPEG-1/2/4, H.264 and VC-1. We defined the permutation matrices to reorder the transform matrix of the $8{\times}8$ DCT and partitioned the reordered $8{\times}8$ transform matrix into four $4{\times}4$ sub-matrices. The $8{\times}8$ DCT is performed by repeating the $4{\times}4$ DCT's based on the reordered and partitioned transform matrices. Since our circuit accepts the transform coefficients from the users, it can be extended very easily to cover any kind of DCT-based transforms for future standards. The multipliers in the DCT circuit are shared by the quantization circuit in order to minimize the circuit size. The quantization circuit is merged into the DCT circuit without any significant increase of circuit resources and processing time. We described the proposed DCT and quantization circuit at RTL, and verified its operation on FPGA board.

• Journal of Korea Multimedia Society
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• v.9 no.10
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• pp.1276-1281
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• 2006

In this paper, We proposed a robust blind digital watermarking algorithm using variance and DCT domain. The proposed method embedded watermark signals into DC components of $8{\times}8$ block DCT using valiance, texture regions and smooth regions. In the digital watermarking algorithms using DCT domain, more robustness can be achieved if watermarks are embedded in DC components since DC components have much larger perceptual capacity than AC components. Experiment showed that robustness of the proposed method better than that of the conventional methods in JPEG quality and scaling attack.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.1C
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• pp.119-128
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• 2004

In this paper, a low-power 8-point DCT structure is proposed using add and shift operations. Proposed structure adopts 4 cycles for complete 8-point DCT in order to minimize size of hardware and to enable high-speed processing. In the structure, hardware for the first cycle can be shared in the next 3 cycles since all columns in the DCT coefficient matrix are common except sign. Conventional DCT structures implemented with only add and shift operation use CSD(Canonic Signed Digit) form coefficients to reduce the number of adders. To reduce the number of adders further, we propose a new structure using common sub-expression sharing techniques. With this techniques, the proposed 8-point DCT structure achieves 19.5% adder reduction comparison to the conventional structure using only CSD coefficient form.

• The Journal of the Korea Contents Association
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• v.12 no.9
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• pp.1-8
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• 2012

In this paper, we propose a rate-distortion optimization method to improve the coding efficiency of the conventional 3D-DCT based compression method using adaptive block mode selection for integral images. In the conventional 3D-DCT based compression method, 3D-DCT blocks of variable block sizes are adaptively selected depending on the characteristics of integral images, and then 3D-DCT is performed. The proposed method applies a rate-distortion optimization to determine the optimal block mode. In addition, we suggest the optimal Lagrangian parameter for integral images. Experimental results show that the proposed method gives bit-rate reduction of about 5%.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.6C
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• pp.603-613
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• 2006

Low-power design is one of the most important challenges encountered in maximizing battery life in portable devices as well as saving energy during system operation. In this paper we propose a low-power DCT (Discrete Cosine Transform) architecture using a modified Computation Sharing Multiplication (CSHM). The overall rate of Power consumption is reduced during DCT: the proposed architecture does not perform arithmetic operations on unnecessary bits during the Computation Sharing Multiplication calculations. Experimental results show that it is possible to reduce power dissipation up to about $7\sim8%$ without compromising the final DCT results. The proposed low-power DCT architecture can be applied to consumer electronics as well as portable multimedia systems requiring high throughput and low-power.

• The KIPS Transactions:PartB
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• v.9B no.5
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• pp.609-614
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• 2002

Watermarking is embedding a digital signal called as watermark into images to claim the ownership. In this paper, a new digital watermarking algorithm based on DCT (Discrete Cosine Transform) which enhances invisibility and robustness is proposed to improve contentional digital watermarking method using DCT. In the proposed method, it is possible to enhance invisibility and robustness using watermark reordering in which the relative significance of original DCT coefficients can be preserved in watermarked DCT coefficients, and the distortions of original DCT coefficients can be minimized. The experimental results show that the proposed method improves invisibility approximately 9～12[dB] and is more robust to various attacks than the conventional method.

• The KIPS Transactions:PartA
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• v.10A no.4
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• pp.347-356
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• 2003

The OCT algorithm needs efficient hardware architecture to compute inner product. The conventional methods have large hardware complexity. Because of this reason. a computation sharing multiplier was proposed for implementing inner product. However, the existing multiplier has inefficient hardware architecture in precomputer and select units. Therefore it degrades the performance of the multiplier. In this paper, we proposed a new efficient computation sharing multiplier and applied it to implementation of 1-D DCT processor. The comparison results show that the new multiplier is more efficient than an old one when hardware architectures and logic synthesis results were compared. The designed 1-D DCT processor by using the proposed multiplier is more high performance than typical design methods.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.3B
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• pp.541-548
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• 2000

In the MPEG-4 standardization phase, many methods for coding the irregular shaped VOP (video object Plane) have been researched. Texture coding is one of interesting research items in the MPEG-4. There are the Low pass extrapolation (LPE) padding, the shape adaptive DCT (SA-DCT), and the Extension-Interpolation (EI)/2D-DCT proposed in [1] as texture coding methods. the EI/2D-DCT is the method extending and interpolating luminance values from and Arbitrarily Shaped (AS) image segment into an 8 x 8 block and transforming the extended and interpolated luminance values by the 8x8 DCT. although the EI/2D-DCT and the SA-DCT work well in coding the As image segments. they are degraded since they use one-dimensional (1-D) methods such as the 1D-EI and the 1D-DCT in the two-dimensional (2-D) space. in this paper, we analyze the performance of the EI/2D-DCTand propose a new non-symmetric sig-sag scanning method, which non-symmetrically scans the quantized coefficients in the DCT domain to improve the EI/2D-DCT.

• Journal of the Institute of Convergence Signal Processing
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• v.8 no.2
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• pp.106-112
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• 2007

This paper proposes a hybrid architecture algorithm for fast computation of DCT and DFT via recursive factorization. Recursive factorization of DCT-II and DFT transform matrix leads to a similar architectural structure so that common architectural base may be used by simply adding a switching device. Linking between two transforms was derived based on matrix recursion formula. Hybrid acrchitectural design for DCT and DFT matrix decomposition were derived using the generation matrix and the trigonometric identities and relations. Data flow diagram for high-speed architecture of Cooley-Tukey type was drawn to accommodate DCT/DFT hybrid architecture. From this data flow diagram computational complexity is comparable to that of the fast DCT algorithms for moderate size of N. Further investigation is needed for multi-mode operation use of FFT architecture in other orthogonal transform computation.