• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.12
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• pp.110-119
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• 1996

A novel high speed VLSI architecture and its VLSI realization methodologies for a motion estimation processor based on full search block matching algorithm are presentd. The presented architecture is designed in order to be suitable for highly parallel and pipelined processing with identical PE's and adjustable in performance and hardware amount according to various application areas. Also, the throughput is maximized by enhancing PE utilization up to 100% and the chip pin count is reduced by reusing image data with embedded image memories. Also, the uniform and identical data processing structure of PE's eases VLSI implementation and the clock rate of external I/O data can be made slower compared to internal clock rate to resolve I/O bottleneck problem. The logic and spice simulation results of the proposed architecture are presented. The performances of the proposed architecture are evaluated and compared with other architectures. Finally, the chip layout is shown.

• IEMEK Journal of Embedded Systems and Applications
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• v.2 no.1
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• pp.24-30
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• 2007

According to development of wireless communication technologies, we need not only high data rate but low data rate system of low power consumption. This low data rate system is utilized in the field of home automation, health care, sensoring and monitoring, etc. IEEE 802.15.4 LR-WPAN system is the best choice for realizing ubiquitous networking system. In this paper SoC Architecture for IEEE 802.15.4 Low Rate WPAN is designed. IEEE 802.15.4 Low Rate WPAN system serves the functions and realization of home area network. We propose the SoC architecture for 868/915MHz frequency band of IEEE 802.15.4 Low Rate WPAN system. The key issue is to design SoC architecture which provides the function of Low Rate WPAN system to meet the requirement of IEEE 802.15.4 standards.

• Journal of the Korean Institute of Rural Architecture
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• v.17 no.1
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• pp.45-54
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• 2015

This study is about the Type classification of architectural assets in Seosungro (one of the 4 Roads of Rampart in Junggu, Daegu), the main stronghold of Urban Regeneration projects according to the recent Urban Regeneration law. The purpose of this study is to suggest the basic data about Operation management method of Original Downtown modern buildings and valuable hanok, and Conservational Regeneration of Architectural property of Urban Environmental Improvement and Architectural assets. By researching, analysing the feature and classifying the type of the buildings in Seosungro, The type classified Conservation plan can be suggested. The Types of the Architectural assets will be the basic data of the application plan of modern buildings which is for the urban regeneration, and this can predict the quantity and the demand of the building for effective urban regeneration, and also can be an effective Urban regeneration policy data.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.12
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• pp.3256-3264
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• 1996

This paper presents an efficient VLSI architecture for transposing matris in high speed. In the case of transposing N*N matrix, N$^{2}$ numbers of transposition cells are configured as regular and spuare shaped structure, and pipeline structure for operating each transposition cell in paralle. Transposition cell consists of register and input data selector. The characteristic of this architecture is that the data to be transposed are divided into several bundles of bits, then processed serially. Using the serial transposition of divided input data, hardware complexity of transpositioncell can be reduced, and routing between adjacent transposition cells can be simple. the proposed architecture is designed and implemented with 0.5 .mu.m VLSI library. As a result, it shows stable operation in 200 MHz and less hardware complexity than conventional architectures.

• Proceedings of the Korea Society for Simulation Conference
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• 2005.05a
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• pp.1-4
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• 2005

Information communication environment integrates communication, broadcasting and internet, and Digital Convergence service emerges in result. Thus, the effective routers are needed so that they can transmit a huge number of data to core internet through appropriate base center. Therefore, the network guaranteeing QoS in transport layer supports interoperability with different wireless networks. So as to users receive necessary information anywhere seamlessly, the network architecture focuses on packet transmission and it is efficient for the control layer switches and controls packets between different networks. Since individual users take advantage of different services and data, the effective router architecture must be designed. Hence in this paper we design monitoring technique to solve security problem and to support premium service to ultimate users. Thereafter, we run opnet simulation and show the improvement of proposed router architecture.

• International conference on construction engineering and project management
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• 2011.02a
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• pp.17-22
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• 2011

A considerable number of construction disasters occur on pathways. Safety management is usually performed on construction sites to prevent accidents in activity areas. This means that the safety management level of hazards on pathways is relatively minimized. Many researchers have noted that hazard identification is fundamental to safety management. Thus, algorithms for helping safety managers to identify hazardous areas are developed using automated data collection technology. These algorithms primarily search for potential hazardous areas by comparing workers' location logs based on a real-time location system and optimal routes based on BIM. Potential hazardous areas are filtered by identified hazardous areas and activity areas. After that, safety managers are provided with information about potential hazardous areas and can establish proper safety countermeasures. This can help to improve safety on construction sites.

• Spatial Information Research
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• v.21 no.4
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• pp.25-34
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• 2013

The purpose of this study is to develop an efficient BIM-based FM(Facility Management) system architecture to integrate the heterogeneous solution data related to FM. The heterogeneous solution data can be an FM system, asset management system, or facility sensor database systems, as well as files created by a modeler. In this study, we define the consideration for the external heterogeneous data integration related to BIM-based FM and propose the methodology. To implement it, trends in related studies were reviewed and general use cases of BIM-based FM were derived to develop the architecture for the integration between BIM and the heterogeneous solution data. The component architecture was designed to implement the use cases, and the schema was developed for the prototype by using the proposed architecture.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.13 no.2
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• pp.1-7
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• 2013

Big data management is becoming increasingly important in both industry and academia of information science community. One of the important categories of big data generated from software systems is log data. Log data is generally used for better services in various service providers and can also be used as information for qualification. This paper presents a big data management architecture specialized for log data. Specifically, it provides the aggregation of log messages sent from multiple clients and provides intelligent functionalities such as analyzing log data. The proposed architecture supports an asynchronous process in client-server architectures to prevent the potential bottleneck of accessing data. Accordingly, it does not affect the client performance although using remote data store. We implement the proposed architecture and show that it works well for processing big log data. All components are implemented based on open source software and the developed prototypes are now publicly available.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1293-1296
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• 2008

As Flat Panel Display become large in format, the data and gate lines turn into longer, parasitic capacitance and resistance increase, and the display signal is delayed. Three dimensional architecture of multiplexing data registration integrated circuit method is used that divides the data line into several blocks and provides the advantages of high accuracy, rapid selection, and reasonable switching speed.

• Proceedings of the Safety Management and Science Conference
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• 2007.11a
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• pp.323-328
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• 2007

This paper introduces radio frequency identification(RFID) information technologies for item management such as application interface of data protocol, data encoding rules and logical memory functions for data protocol, and, unique identification for RF tags. This study presents reference architecture and definition of parameters to be standardized, various parameters for air intreface communications, and, application requirements profiles.