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Channel geometry-dependent characteristics in silicon nano-ribbon and nanowire FET for sensing applications

  • Choe, Chang-Yong;Hwang, Min-Yeong;Kim, Sang-Sik;Gu, Sang-Mo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.11a
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    • pp.33-33
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    • 2009
  • Silicon nano-structures have great potential in bionic sensor applications. Atomic force microscopy (AFM) anodic oxidation have many advantages for the nanostructure fabrication, such as simple process in atmosphere at room temperature, compatibility with conventional Si process. In this work, we fabricated simple FET structures with channel width W~ 10nm (nanowire) and $1{\mu}m$ (nano-ribbon) on ~10, 20 and 100nm-thinned silicon-on-insulator (SOI) wafers in order to investigate the surface effect on the transport characteristics of nano-channel. For further quantitative analysis, we carried out the 2D numerical simulations to investigate the effect of channel surface states on the carrier distribution behavior inside the channel. The simulated 2D cross-sectional structures of fabricated devices had channel heights of H ~ 10, 20, and 100nm, widths of L ~ $1{\mu}m$ and 10nm respectively, where we simultaneously varied the channel surface charge density from $1{\times}10^{-9}$ to $1{\times}10^{-7}C/cm2$. It has been shown that the side-wall charge of nanowire channel mainly affect the I-V characteristics and this was confirmed by the 2D numerical simulations.

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A Study on the Electrical Characterization of Top-down Fabricated Si Nanowire ISFET (Top-down 방식으로 제작한 실리콘 나노와이어 ISFET 의 전기적 특성)

  • Kim, Sungman;Cho, Younghak;Lee, Junhyung;Rho, Jihyoung;Lee, Daesung
    • Journal of the Korean Society for Precision Engineering
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    • v.30 no.1
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    • pp.128-133
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    • 2013
  • Si Nanowire (Si-NW) arrays were fabricated by top-down method. A relatively simple method is suggested to fabricate suspended silicon nanowire arrays. This method allows for the production of suspended silicon nanowire arrays using anisotropic wet etching and conventional MEMS method of SOI (Silicon-On-Insulator) wafer. The dimensions of the fabricated nanowire arrays with the proposed method were evaluated and their effects on the Field Effect Transistor (FET) characteristics were discussed. Current-voltage (I-V) characteristics of the device with nanowire arrays were measured using a probe station and a semiconductor analyzer. The electrical properties of the device were characterized through leakage current, dielectric property, and threshold voltage. The results implied that the electrical characteristics of the fabricated device show the potential of being ion-selective field effect transistors (ISFETs) sensors.

Driving Per Nozzle By Various Waveform Depending On Resonance Frequency In Piezoelectric Inkjet Head (잉크젯 헤드의 공진주파수에 따른 구동파형을 이용한 개별노즐 제어)

  • Kim, Y.J.;Park, C.S.;Sim, W.C.;Kang, P.J.;Yoo, Y.S.;Park, J.H.;Joung, J.W.;Oh, Y.S.
    • Proceedings of the KIEE Conference
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    • 2007.07a
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    • pp.1542-1543
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    • 2007
  • This paper presents the effect of driving waveform for piezoelectric bend mode inkjet printhead with optimized mechanical design. Experimental and theoretical studies on the applied driving waveform versus jetting characteristics were performed. The inkjet head has been designed to maximize the droplet velocity, minimize voltage response of the actuator and optimize the firing frequency to eject ink droplet. The head design was carried out by using mechanical simulation. The printhead has been fabricated with Si(100) and SOI wafers by MEMS process and silicon direct bonding method. To investigate how performance of the piezoelectric ceramic actuator influences on droplet diameter and droplet velocity, the method of stroboscopy was used. Using the water based ink of viscosity of 11.8 cps and surface tension of 0.025N/m, it is possible to eject stable droplets through 64 nozzles average velocity of 4.05 m/s with standard deviation of 0.06 m/s and average diameter of $29.2\;{\mu}m$ with standard variation of $0.5\;{\mu}m$.

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Characterization of SOI Wafers Fabricated by a Modified Direct Bonding Technology

  • Kim, E.D.;Kim, S.C.;Park, J.M.;Kim, N.K.;Kostina, L.S.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.04b
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    • pp.47-51
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    • 2000
  • A modified direct bonding technique employing a wet chemical deposition of $SiO_2$ film on a wafer surface to be bonded is proposed for the fabrication of Si-$SiO_2$-Si structures. Structural and electrical quality of the bonded wafers is studied. Satisfied insulating properties of interfacial $SiO_2$ layers are demonstrated. Elastic strain caused by surface morphology is investigated. The diminution of strain in the grooved structures is semi-quantitatively interpreted by a model considering the virtual defects distributed over the interfacial region.

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A study on the Byzantine Costume -An analysis of constructional elements of the Costume Form- (Byzantine시대의 복식에 관한 연구 -복장 형태구성의 요인 해석-)

  • Kim Ok Jin
    • Journal of the Korean Society of Clothing and Textiles
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    • v.3 no.1
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    • pp.25-30
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    • 1979
  • Le propos de la presente consideration est de deceler Ie probleme du costume au niveau de probleme de l'art pur qui, comme dit Hegel, repond a un besoin primitif qui consiste a exterioriser et a concretiser les representations et les idees nees dans I'esprit humain. II va de soi que c'est une sorte de problemes appartenants a la theorie generale du costume. Mais il nous semble que chez nous on a neglige d'analyser les elements du costume sous l'angle de cette exteriorisation de l'idee esthetique que nous avons essay de souligner. Nous avons pris cette fois, pour un modele de ce sujet, les costumes sous Justinien (527-565) de l'Empire byzantin.

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Advances in MEMS Based Planar VOA

  • Lee, Cheng-Kuo;Huang, RueyShing
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.7 no.3
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    • pp.183-195
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    • 2007
  • MEMS technology is proven to be an enabling technology to realize many components for optical networking applications. Due to its widespread applications, VOA has been one of the most attractive MEMS based key devices in optical communication market. Micromachined shutters and refractive mirrors on top of silicon substrate or on the device layer of SOI (Silicon-on-insulator) substrate are the approaches trapped tremendous research activities, because such approaches enable easier alignment and assembly works. These groups of devices are known as the planar VOAs, or two-dimensional (2-D) VOAs. In this review article, we conduct the comprehensively literature survey with respect to MEMS based planar VOA devices. Apparently MEMS VOA technology is still evolving into a mature technology. MEMS VOA technology is not only the cornerstone to support the future optical communication technology, but the best example for understanding the evolution of optical MEMS technology.

Trench Shorted Anode LIGBT on 501 Substrates (트랜치 구조를 갖는 단락 애노드 SOI LIGBT)

  • Choe, Seung-Pil;Ha, Min-U;Han, Min-Gu;Choe, Yeon-Ik
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.51 no.5
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    • pp.196-198
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    • 2002
  • A trench shorted anode LIGBT (TSA-LIGBT) which decreases the device area and the forward voltage drop has been proposed and verified by 2D device simulations. The trench located in the shorted anode would form the shorted anode. The simulation results show that TSA-LIGBT decrease the device area by about 20% and the forward voltage drop by over 75% compared with the conventional ones. Also the troublesome negative differential resistance (NDR) regime has been eliminated successfully in the TSA-LIGBT.

Impacts of Trapezoidal Fin of 20-nm Double-Gate FinFET on the Electrical Characteristics of Circuits

  • Ryu, Myunghwan;Kim, Youngmin
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.4
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    • pp.462-470
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    • 2015
  • In this study, we analyze the impacts of the trapezoidal fin shape of a double-gate FinFET on the electrical characteristics of circuits. The trapezoidal nature of a fin body is generated by varying the angle of the sidewall of the FinFET. A technology computer-aided-design (TCAD) simulation shows that the on-state current increases, and the capacitance becomes larger, as the bottom fin width increases. Several circuit performance metrics for both digital and analog circuits, such as the fan-out 4 (FO4) delay, ring oscillator (RO) frequency, and cut-off frequency, are evaluated with mixed-mode simulations using the 3D TCAD tool. The trapezoidal nature of the FinFET results in different effects on the driving current and gate capacitance. As a result, the propagation delay of an inverter decreases as the angle increases because of the higher on-current, and the FO4 speed and RO frequency increase as the angle increases but decrease for wider angles because of the higher impact on the capacitance rather than the driving strength. Finally, the simulation reveals that the trapezoidal angle range from $10^{\circ}$ to $20^{\circ}$ is a good tradeoff between larger on-current and higher capacitance for an optimum trapezoidal FinFET shape.

The Effects of Driving Waveform of Piezoelectric Industrial Inkjet Head for Fime Patterns (산업용 압전 잉크젯 헤드의 구동신호에 따른 특성)

  • Kim, Young-Jae;Yoo, Young-Seuck;Sim, Won-Chul;Park, Chang-Sung;Joung, Jae-Woo;Oh, Yong-Soo
    • Proceedings of the KIEE Conference
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    • 2006.07c
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    • pp.1621-1622
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    • 2006
  • This paper presents the effect of driving waveform for piezoelectric bend mode inkjet printhead with optimized mechanical design. Experimental and theoretical studies on the applied driving waveform versus jetting characteristic s were performed. The inkjet head has been designed to maximize the droplet velocity, minimize voltage response of the actuator and optimize the firing frequency to eject ink droplet. The head design was carried out by using mechanical simulation. The printhead has been fabricated with Si(100) and SOI wafers by MEMS process and silicon direct bonding method. To investigate how performance of the piezoelectric ceramic actuator influences on droplet diameter and droplet velocity, the method of stroboscopy was used. Also we observed the movement characteristics of PZT actuator with LDV(Laser Doppler Vibrometer) system, oscilloscope and dynamic signal analyzer. Missing nozzles caused by bubbles in chamber were monitored by their resonance frequency. Using the water based ink of viscosity of 4.8 cps and surface tension of 0.025N/m, it is possible to eject stable droplets up to 20kHz, 4.4m/s and above 8pL at the different applied driving waveforms.

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Effects of Annealing Gas and Pressure Conditions on the Electrical Characteristics of Tunneling FET (가스 및 압력조건에 따른 Annealing이 Tunneling FET의 전기적 특성에 미치는 영향)

  • Song, Hyun-Dong;Song, Hyeong-Sub;Babu, Eadi Sunil;Choi, Hyun-Woong;Lee, Hi-Deok
    • Journal of IKEEE
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    • v.23 no.2
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    • pp.704-709
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    • 2019
  • In this paper, the electrical characteristics of tunneling field effect transistor(TFET) was studied for different annealing conditions. The TFET samples annealed using hydrogen forming gas(4 %) and Deuterium($D_2$) forming gas(4 %). All the measurements were conducted in noise shielded environment. The results show that subthreshold slope(SS) decreased by 33 mV/dec after annealing process compared to before annealing. Under various temperature range, the noise is improved by average of 31.2 % for 10 atm Deuterium gas at $V_G=3V$ condition. It is also noticed that, post metal annealing with $D_2$ gas reduces the noise by average of 30.7 % at $I_D=100nA$ condition.