• Journal of Information Display
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• 제3권3호
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• pp.35-43
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• 2002

Silicon-based 0.69-inch AMOEL microdisplay with integrated driver and timing controller circuits for microdisplay applications has been developed using 0.35 ${\mu}m$ l-poly 4-metal standard CMOS process with 5 V CMOS devices and CMP (Chemical Mechanical Polishing) technology. To reduce the large data programming time consumed in a conventional current programming pixel circuit technique and to achieve uniform display, de-amplifying current mirror pixel circuit and the current-mode data driver circuit with threshold roltage compensation are proposed. The proposed current-mode data driver circuit is inherently immune to the ground-bouncing effect. The Monte-Carlo simulation results show that the proposed current-mode data driver circuit has channel-to-channel non-uniformity of less than ${\pm}$0.6 LSB under ${\pm}$70 mV threshold voltage variaions for both NMOS and PMOS transistors, which gives very good display uniformity.

• 한국소음진동공학회:학술대회논문집
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• 한국소음진동공학회 2008년도 추계학술대회논문집
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• pp.385-386
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• 2008

Dynamic stability of the vehicle rearview mirror is an important factor for the driver's visual perception (image blur) when driving down the road and regarded as one of the vehicle level N&V performance of visible component vibration. Several projects within GM identified a set of objective metrics and validation methods that can replace current existing subjective evaluation of mirror stability. This paper presents objective evaluation results for assessing dynamic stability (angle of rotation) of the vehicle rearview mirrors using both in-lab FRF measurements and on-road testing.

• JSTS:Journal of Semiconductor Technology and Science
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• 제3권3호
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• pp.139-144
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• 2003

We report the results of extensive mixed mode simulations and theoretical analysis to quantify the contribution of the edge direct tunneling (EDT) current on the total gate leakage current of 80nm NMOSFET with SiO2 gate dielectric. It is shown that EDT has a profound impact on basic analog circuit building blocks such as sample-hold (S/H) circuit and the current mirror circuit. A transistor design methodology with zero gate-source/drain overlap is proposed to mitigate the EDT effect. This results in lower voltage droop in S/H application and better current matching in current mirror application. It is demonstrated that decreasing the overlap length also improves the basic analog circuit performance metrics of the transistor. The transistor with zero gate-source/drain overlap, results in better transconductance, input resistance, output resistance, intrinsic gain and unity gain transition frequency.

• 한국전자통신학회논문지
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• 제14권1호
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• pp.199-204
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• 2019

본 논문에서는 개인의 일상생활에 필요한 컨텐츠를 제공하는 스마트 미러를 소개한다. 음성인식으로 지정해놓은 명령어를 입력하면 디스플레이에서 원하는 컨텐츠를 출력하는 스마트 미러를 제작하였다. 현재 제작한 스마트 미러의 컨텐츠는 시간과, 날씨, 지하철정보, 일정, 사진이 있다. 시중의 개인 가정용으로 판매하고 있는 스마트 미러는 비싼 가격으로 인해 보급이 어려운 상태이지만 본 논문에서 제시하는 스마트 미러 제작을 통해 제조 단가를 낮출 수 있으며, 음성인식으로 더 편리하게 이용할 수 있다.

• 조명전기설비학회논문지
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• 제18권2호
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• pp.135-141
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• 2004

보호계전 시스템의 전류센서로 사용할 목적으로 편광분석형 광섬유 전류센서를 개발하였다. 광섬유의 선형복굴절에 의한 출력의 왜곡을 최소화하기 위하여 단일모드 광섬유를 미터 당 20회 이상 비틀고 그 끝단에 FRM(Faraday rotator mirror)을 부착하여 센서코일을 제작하였다. 광섬유 센서코일의 비틀림 정도를 달리하며 다양한 환경에서의 전류측정 실험을 행하였다. 실험결과로부터 광섬유 센서코일이 진동 등의 환경적 노이즈를 효율적으로 차단함을 알 수 있었으며 $\pm$3% 이내의 시스템 출력안정도를 얻었다.

• Current Optics and Photonics
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• 제8권5호
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• pp.493-501
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• 2024

This study proposes an effective visualization method for image distortion in high-resolution, machinable Fresnel mirrors, which offer significant advantages over traditional convex mirrors by being thinner and lighter. While commercial optical design programs are excellent at optimizing aberrations, they have some limitations in visualizing images from complex optical configurations. Therefore, NX^TM CAD software is employed to achieve photorealistic ray-traced visualization with high-fidelity image rendering due to its flexible two-dimensional and three-dimensional modeling environments. In comparative simulations with various mirror profiles, we identified an aspherical Fresnel mirror with a conic constant of k = -3 that can reduce distortion to 1.79%, according to Zemax OpticStudio^® calculations. Finally, the NX^TM software successfully validated the distortion image of our machinable aspherical Fresnel mirror design. Subsequent practical experiments validated the consistency between the predicted distortion and the actual visualization results. We anticipate that this specialized visualization technique holds the potential to radically transform the interactive design of optical systems that incorporate aspherical Fresnel mirrors.

• 한국전기전자재료학회논문지
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• 제23권9호
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• pp.667-670
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• 2010

In this paper, a high voltage current sensing circuit for boost converter is designed and verified by Cadence SPECTRE simulations. The current mirror pair, power and sensing metal-oxide semiconductor field effect transistors (MOSFETs) with size ratio of K, is used in our on-chip current sensing circuit. Very low drain voltages of the current mirror pair should be matched to give accurate current sensing, so a folded-cascode opamp with a PMOS input pair is used in our design. A high voltage high side lateral-diffused MOS transistor (LDMOST) switch is used between the current sensing circuit and power MOSFET to protect the current sensing circuit from the high output voltage. Simulation results using 0.35 ${\mu}m$ BCD process show that current sensing is accurate and the pulse frequency modulation (PFM) boost converter using the proposed current sensing circuit satisfies with the specifications.

• 한국통신학회논문지
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• 제17권8호
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• pp.867-880
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• 1992

본 논문에서는 갈륨비소 연산 증폭기의 입력단 설계에 있어서 기초가 되는 차동 증폭기에 사용될 이득 증가 기법을 적용한 단일 증폭기와 새로운 구성의 전류 미러를 설계하였다.차동 전압 이득을 높이기 위하여 단일 증폭기의 bootstrap 이득 증가 기법을 이용하여 차증 증폭기를 구성하였다. 차동 증폭기에 사용되는 정전류원으로서 주파수 특성이 우수한 선형 역상 전류 미러를 사용하여 회로의 안정화를 꾀하였다. 또한, 동상 전압 이득을 감소시키기 위하여 common mode feedback을 사용함으로써 차동 증폭기의 성능 평가에 있어서중요한 CMRR을 높였다.PSPICE를 통한 시뮬레이션 결과, 기본 단일 증폭기의 이득은 29.dB인데 비하여 새로 설계된 new bootstrapped 이득 증가 기법을 사용한 경우에는 57.67db로써 이득이 28.26dB 개선되었음을 알 수 있었다. 또한, 본 논문에서 설계한 차동 증폭기는 차동 이득이 57.66dB, CMRR이 83.98dB로써 기존의 논문보다 향상되었고 주파수 특성면에서도 차단 주파수가 23.26GHz로써 우수함을 입증하였다.

• ETRI Journal
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• 제45권3호
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• pp.519-533
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• 2023

This paper implements a simultaneous solar and thermal energy harvesting system, as a hybrid energy harvesting (HEH) system, to convert ambient light into electrical energy through photovoltaic (PV) cells and heat absorbed in the body of PV cells. Indeed, a solar panel equipped with serially connected thermoelectric generators not only converts the incoming light into electricity but also takes advantage of heat emanating from the light. In a conventional HEH system, the diode block is used to provide the path for the input source with the highest value. In this scheme, at each time, only one source can be handled to generate its output, while other sources are blocked. To handle this challenge of combining resources in HEH systems, this paper proposes a method for collecting all incoming energies and conveying its summation to the load via the current mirror cells in an approach similar to the maximum power point tracking. This technique is implemented using off-the-shelf components. The measurement results show that the proposed method is a realistic approach for supplying electrical energy to wireless sensor nodes and low-power electronics.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.14-14
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• 2010

A high voltage current sensing circuit for LED driver IC is designed and verfied by Cadence SPECTRE simulations. The current mirror pair, power and sensing MOSFETs with size ratio of K, is used in our on-chip current sensing circuit. Very low drain voltages of the current mirror pair should be matched to give accurate current sensing, so a folded-cascode opamp with a PMOS input pair is used in our design. A high voltage high side LDMOST switch is used between the current sensing circuit and power MOSFET to protect the current sensing circuit from the high output voltage. Simulation results using 0.35um BCD process show that current sensing is accurate with properly frequency compensated opamp.