• Title/Summary/Keyword: current loop

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An Inductance Voltage Vector Control Strategy and Stability Study Based on Proportional Resonant Regulators under the Stationary αβ Frame for PWM Converters

  • Sun, Qiang;Wei, Kexin;Gao, Chenghai;Wang, Shasha;Liang, Bin
    • Journal of Power Electronics
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    • v.16 no.3
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    • pp.1110-1121
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    • 2016
  • The mathematical model of a three phase PWM converter under the stationary αβ reference frame is deduced and constructed based on a Proportional-Resonant (PR) regulator, which can replace trigonometric function calculation, Park transformation, real-time detection of a Phase Locked Loop and feed-forward decoupling with the proposed accurate calculation of the inductance voltage vector. To avoid the parallel resonance of the LCL topology, the active damping method of the proportional capacitor-current feedback is employed. As to current vector error elimination, an optimized PR controller of the inner current loop is proposed with the zero-pole matching (ZPM) and cancellation method to configure the regulator. The impacts on system's characteristics and stability margin caused by the PR controller and control parameter variations in the inner-current loop are analyzed, and the correlations among active damping feedback coefficient, sampling and transport delay, and system robustness have been established. An equivalent model of the inner current loop is studied via the pole-zero locus along with the pole placement method and frequency response characteristics. Then, the parameter values of the control system are chosen according to their decisive roles and performance indicators. Finally, simulation and experimental results obtained while adopting the proposed method illustrated its feasibility and effectiveness, and the inner current loop achieved zero static error tracking with a good dynamic response and steady-state performance.

Torque Control Scheme of Switched Reluctance Motor using Neural Network (신경회로망을 이용한 SRM의 토오크 제어)

  • 정연석;이장선;김윤호
    • Proceedings of the KIPE Conference
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    • 1999.07a
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    • pp.171-174
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    • 1999
  • The torque of SRM is developed by phase currents and inductance variation. Phase currents and inductance variation. Phase current is often the controlled variable in electrical motor drives, so it seems natural to use closed loop current controllers. However, the highly nonlinear nature of switched reluctance motors makes optimisation of closed loop current controlled difficult because of saturation effect in magnetic circuit. Therefore, torque generation region is nonlinearly varied according to phase current and rotor position. This paper describes the torque control scheme with neural network that can control varied with load torque. The torque control is simulated by PSIM.

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Crack width control of precast deck loop joints for continuous steel-concrete composite girder bridges

  • Shim, Changsu;Lee, Chidong
    • Advances in concrete construction
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    • v.10 no.1
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    • pp.21-34
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    • 2020
  • Precast deck joints have larger crack width than cast-in-place concrete decks. The initial crack typically occurs at the maximum moment but cracks on precast joints are significant and lead to failure of the deck. The present crack equation is applied to cast-in-place decks, and requires correction to calculate the crack width of precast deck joints. This research aims to study the crack width correction equation of precast decks by performing static tests using high strength and normal strength concrete. Based on experimental results, the bending strength of the structural connections of the current precast deck is satisfied. However it is not suitable to calculate and control the crack width of precast loop connections using the current design equation. A crack width calculation equation is proposed for crack control of precast deck loop joints. Also included in this paper are recommendations to improve the crack control of loop connections.

An Interleaved Five-level Boost Converter with Voltage-Balance Control

  • Chen, Jianfei;Hou, Shiying;Deng, Fujin;Chen, Zhe;Li, Jian
    • Journal of Power Electronics
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    • v.16 no.5
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    • pp.1735-1742
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    • 2016
  • This paper proposes an interleaved five-level boost converter based on a switched-capacitor network. The operating principle of the converter under the CCM mode is analyzed. A high voltage gain, low component stress, small input current ripple, and self-balancing function for the capacitor voltages in the switched-capacitor networks are achieved. In addition, a three-loop control strategy including an outer voltage loop, an inner current loop and a voltage-balance loop has been researched to achieve good performances and voltage-balance effect. An experimental study has been done to verify the correctness and feasibility of the proposed converter and control strategy.

A Study on the Parallel Operation and Control Loop Design of ZVT-Full Bridge DC/DC Converter (ZVT 풀 브리지 DC/DC 컨버터의 병렬 운전 및 제어기 설계에 관한 연구)

  • Bae, Jin-Yong;Kim, Yong;Yoon, Suk-Ho;Chang, Sung-Won;Lee, Kyu-Hoon
    • Proceedings of the KIEE Conference
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    • 2001.04a
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    • pp.324-328
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    • 2001
  • This paper presents parallel operation and control loop design of ZVT(Zero Voltage Transition) Full Bridge DC/DC Converter. At parallel operation of ZVT Full Bridge Converter, dynamic current shared inductor devides the same current of unit converter and ZVT circuit and aids to high efficiency in the system. Base on the modeling of ZVT. Full Bridge Converter, the control loop is designed using a simple two-pole, one-zero compensation circuit. To show the validity of the design procedures, the small signal analysis of the closed loop system and open loop system is carried out and the superiority of the dynamic characteristics is verified through the experiment with a 2kW, 50kHz prototype converter.

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Design of Robust Double Digital Controller to Improve Performance for UPS Inverter (UPS 인버터의 성능 개선을 위한 강인한 2중 디지털 제어기의 설계)

  • 박지호;노태균;김춘삼;안인모;우정인
    • The Transactions of the Korean Institute of Power Electronics
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    • v.8 no.2
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    • pp.116-127
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    • 2003
  • In this paper, a new fully digital control method for UPS inverter, which is based on the double control loop such as the outer voltage control loop and inner current control loop, is proposed. In the proposed control system, overshoots and oscillations due to the computation time-delay are compensated by explicit incorporation of the time-delay in the current control loop transfer function. The inner current control loop is adopted by an Internal model controller The Internal model controller is designed to a second order deadbeat reference-to-output response which means that its response reaches the reference in two sampling time including computational time-delays. The outer voltage control loop employing P-Resonance controller is proposed. The resonance controller has an infinite gain at resonant frequency, and the resonant frequency is set to the fundamental frequency of the reference voltage in this paper. Thus the outer voltage control loop causes no steady state error as regard to both magnitude and phase. The effectiveness of the proposed control system has been verified by the simulation and experimental results respectively.

Design of Interleaved Boost Power Factor Preregulator (Interleaved 승압형 역률 전치보상 컨버터의 설계)

  • Heo, T.W.;Noh, T.G.;Jung, J.R.;Ahn, I.M.;Son, Y.D.;Woo, J.I.
    • Proceedings of the KIEE Conference
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    • 2002.07b
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    • pp.1123-1125
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    • 2002
  • In this paper, interleaved boost converter is applied as a pre-regulator in switch mode power supply. Interleaved Boost Power Factor Preregulator (IBPFP) can reduce input current ripple as a simple voltage control loop only without inner current loop, because input current is divided each 50% by two switching devices. IBPFP can be classified as three cases from duty ratio condition in continuous current mode and be carried out state space averaging small signal modeling. According to modeling, the PID controller is applied and voltage control loop is constructed for suitable design condition. From frequency domain analysis, it is verified that control system is satisfied with design condition of switch mode power supply.

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Analysis of the Charge Controlled Inductor Current Sensing Peak-Power-Tracking Solar Array Regulator

  • Lee, K.S.;Cho, Y.J.;Cho, B.H.
    • Proceedings of the KIPE Conference
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    • 1998.10a
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    • pp.982-986
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    • 1998
  • The peak-power-tracking solar array regulator sensing the inductor current is proposed. Since it uses the inductor current as the solar array output power information, the PPT control scheme can be greatly simplified. The charge controlled two-loop scheme is presented to improve the dynamics due to the inductor current sensing. The comparison between the single-voltage loop controlled system and the two-loop controlled system employing the charge control is presented. This paper also contains the simulation results of that comparison.

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A novel design method for the velocity controller of DC servo motor (새로운 DC 서어보 모우터 속도제어기 설계에 관한 연구)

  • 장태규;변증남
    • 전기의세계
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    • v.30 no.8
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    • pp.501-508
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    • 1981
  • A novel and simple method of designing the current feedback loop for the velocity controller of an armature controlled dc servo motor is presented. Instead of constructing the usual tight current feedback loop, a loose current feedback loop is suggested in this paper. More specifically, the armature current is not limited to a fixed constant value, but instead the upper bound value is allowed to be variable along with the present motor speed. The control system designed in this manner shows that the motor under control is robust to a wide range of loading conditions and yields a more rapid transient characteristics which is verified experimentally by applying the method in the design of the controller for an Industrial robot.

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Parasitic Inductance Reduction Design Method of Vertical Lattice Loop Structure for Stable Driving of GaN HEMT (GaN HEMT의 안정적 구동을 위한 수직 격자 루프 구조의 기생 인덕턴스 저감 설계 기법)

  • Yang, Si-Seok;Soh, Jae-Hwan;Min, Sung-Soo;Kim, Rae-Young
    • The Transactions of the Korean Institute of Power Electronics
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    • v.25 no.3
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    • pp.195-203
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    • 2020
  • This paper presents a parasitic inductance reduction design method for the stable driving of GaN HEMT. To reduce the parasitic inductance, we propose a vertical lattice loop structure with multiple loops that is not affected by the GaN HEMT package. The proposed vertical lattice loop structure selects the reference loop and designs the same loop as the reference loop by layering. The design reverses the current direction of adjacent current paths, increasing magnetic flux cancellation to reduce parasitic inductance. In this study, we validate the effectiveness of the parasitic inductance reduction method of the proposed vertical lattice loop structure.