• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.28 no.11
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• pp.68-76
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• 2014

This paper presents an offset error compensation algorithm for the accurate phase angle of the grid voltage in single-phase grid-connected inverters. The offset error generated from the grid voltage measurement process cause the fundamental harmonic component with grid frequency in the synchronous reference frame phase lock loop (PLL). As a result, the grid angle is distorted and the power quality in power systems is degraded. In addition, the dq-axis currents in the synchronous reference frame and phase current have the dc component, first and second order ripples compared with the grid frequency under the distorted grid angle. In this paper, the effects of the offset and scaling errors are analyzed based on the synchronous reference frame PLL. Particularly, the offset error can be estimated from the integrator output of the synchronous reference frame PLL and compensated by using proportional-integral controller. Moreover, the RMS (Root Mean Square) function is proposed to detect the offset error component. The effectiveness of the proposed algorithm is verified through simulation and experiment results.

• Proceedings of the KIEE Conference
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• 2001.11c
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• pp.42-45
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• 2001

In the speed-sensorless induction motor control systems, only a few percents of error in current measurement badly deteriorates the control performance. And early detection and accomodation of the faults of current sensor is very important to enhance the reliability of the induction motor control system. In this paper, we propose two sensor fault detection schemes having desired functions; fault detection, isolation of failed sensor and compensation of fault effect. The two schemes operate in real-time and employ EKFs (Extended Kalman Filter) for residual generation. Simulation results show that the proposed schemes are very useful in maintaining the control performance of the induction motor driven servo systems even in the face of sensor faults.

• Proceedings of the KIEE Conference
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• 1999.07b
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• pp.976-978
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• 1999

Recently PWM invertor is broadly used for control of induction motor. The invertor is able to generate sin wave current from high speed switching power device such as IGBT. However the invertor is disturbed by dead time inevitably needed to prevent a short of the DC link voltage, and the dead time mainly causes distortions of the output current. In this Paper the dead time compensation method which corrects the voltage error from dead time, and Min Max algorithm enlarging the operating voltage of PWM were Proposed. This method can be implemented by software programming without any additional hardware circuit. The proposed algorithms were implemented by DSP(TMS320C31, 40MHz) and FPGA(QL2007, Quick Logic) described in VHDL. and applied to 3 phase induction motor(2.2 KW) to show the superior performance

• Current Optics and Photonics
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• v.8 no.1
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• pp.56-64
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• 2024

In response to the current situation where general methods cannot effectively compensate for the phase delay of ordinary optical mixers, a multi-layer spatial beam-splitting optical mixer is designed using total reflection triangular prisms and polarization beam splittings. The phase delay is generated by the wave plate, and the mixer can use the existing parallel plates in the structure to individually compensate for the phase of the four output beams. A mixer model is established based on the structure, and the influence of the position and orientation of the optical components on the phase delay is analyzed. The feasibility of the phase compensation method is simulated and analyzed. The results show that the mixer can effectively compensate for the four outputs of the optical mixer over a wide range. The mixer has a compact structure, good performance, and significant advantages in phase error control, production, and tuning, making it suitable for free-space coherent optical communication systems.

• Journal of Power Electronics
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• v.12 no.1
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• pp.58-66
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• 2012

SRMs(Switched Reluctance Motors) are much interested in high speed applications due to the mechanical robustness, simple structure and high efficiency. In spite of many advantages of SRMs, a higher torque ripple discourages the adoption of SRMs in a high speed application. This paper presents a simple negative torque of tail current compensation scheme using a modified TSF(Torque Sharing Function) for the high speed SRMs. Because of the short commutation in the high speed region, the negative torque from the tail current makes the high torque ripple. In order to reduce and compensate the negative torque from tail current, the proposed control scheme produces an additional compensating torque with a reference torque in the active phase winding. And the compensating value is dependent on the tail current of the inactive phase winding. Furthermore, the switching signals of the outgoing phase are fully turned off to restrict the extended tail current, and the torque error of the outgoing phase is compensated by the incoming phase. The proposed modified TSF control scheme is verified by the computer simulations with 30,000[rpm] high speed 4/2 SRM. The simulation and experimental results show the effectiveness of the proposed control scheme.

• Journal of Power Electronics
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• v.10 no.3
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• pp.313-319
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• 2010

This paper proposes a new compensation algorithm for the current measurement errors in a DFIG (Doubly Fed Induction Generator). Generally, current measurement path with current sensors and analog devices has non-ideal factors like offset and scaling errors. As a result, the dq-axis currents of the synchronous reference frame have one and two times ripple components of the slip frequency. In this paper, the main concept of the proposed algorithm is implemented by integrating the 3-phase rotor currents into the stationary reference frame to compensate for the measured current ripples in a DFIG. The proposed algorithm has several beneficial features: easy implementation, less computation time, and robustness with regard to variations in the electrical parameters. The effectiveness of the proposed algorithm is verified by several experiments.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.54 no.4
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• pp.163-170
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• 2005

This paper deals with an improved fault location algorithm with compensation ground capacitance through distributed parameter for a long parallel T/L. For the purpose of fault locating algorithm non-influenced by source impedance and fault resistance, the loop method was used in the system modeling analysis. This algorithm uses a positive and negative sequence of the fault current for high accuracy of fault locating calculation. Power system model of 160km and 300km long parallel T/L was simulated using EMTP software. To evaluate of the proposed algorithm, we used the several different cases 64 sampled data per cycle. The test results show that the proposed algorithm was minimized the error factor and speed of fault location estimation.

• Journal of Power Electronics
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• v.16 no.1
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• pp.18-26
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• 2016

This paper proposes a compensation algorithm for reducing a specific ripple component on synchronous reference frame phase locked loop (SRF-PLL) in grid-tied single-phase inverters. In general, SRF-PLL, which is based on all-pass filter to generate virtual voltage, is widely used to estimate the grid phase angle in a single-phase system. In reality, the estimated grid phase angle might be distorted because the phase difference between actual and virtual voltages is not 90 degrees. That is, the phase error is caused by the difference between cut-off frequency of all-pass filter and grid frequency under grid frequency variation. Therefore, the effects on phase angle and output current attributed to the phase error are mathematically analyzed in this paper. In addition, the proportional resonant (PR) controller is adapted to reduce the effects of phase error. The validity of the proposed algorithm is verified through several simulations and experiments.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.1291-1296
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• 2005

In this paper, we prevent a display quality drop for image of characteristics brightness ununiformity depend on LED use to LED vision. It is about that method also a control system development equipped with brightness compensation function of LED vision which is done easily for LED set up of LED vision. Generally, It is calculate driving current value is attended by each brightness to brightness characteristics mathematical function establish by "Y=aX+b", When is doing brightness value for "Y", driving current value for "X", brightness compensation value by using time for "b", characteristics value for "a" ground with characteristics curve of LED. So much, First It is create brightness data of each pixel take a photograph red, green and blue of LED vision. Second It is get average error about each pixel which get average brightness value of entire. Last, It is handle a complicated for about gradationally regulation to color and brightness of image send to LED vision. Also It raise the whole average brightness value of vision adjust for "b" value to solve brightness drop problem of LED using the long time.

• Proceedings of the KIEE Conference
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• 1989.07a
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• pp.531-534
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• 1989

In this paper, the way that input voltage and input line current as a control variable is provided as one unit is projected. Till no, have denied with three phase balanced load. But, in that case, total power factor compensation is difficult, for to control each phase at unbalanced load. Therefor, in this paper suggest of the scheme that three phase unbalanced load is controlled by each phase and input total power factor is compensated unit input factor. therefore, in this paper suggest that three phase unbalanced load is controlled and the method in compensation of unit input factor to be attended by unbalanced load. Besides, the object of control is calculating quantity for input voltage and input line current for the point at issuse make to improve of control method at unbalanced load. As a result, control system of each phase could maintain as a unit input total power factor has been state diviation error of 2% with unbalanced load.