• Title/Summary/Keyword: current amplifier

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The study of a chopper-type transistorized d.c. amplifier circuit (교류변환형 트란지스터식 직류증폭회로에 관한 연구)

  • 한만춘;최창준
    • 전기의세계
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    • v.18 no.5
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    • pp.12-19
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    • 1969
  • The sensitivity of transistorized d.c. amplifiers is mainly limited by drift at operating point caused by ambient temperature changes. A chopper-type transistorized amplifier is necessary to obtain a high sensitivity without recourse to drift compensation which requires the adjustment of several balancing controls. A chopper-stabilized system consisting of an electro-mechanical chopper for input and output and a high-gain a.c. amplifier is designed and analyzed. The gain of the a.c. amplifier, expressed as the ratio of voltages, is larger than 80db in the band of 50C/S - 100KC/S. The complete system gives an open-loop gain of 68db at direct current. The offset voltage is 20.mu.V referred in input and the voltage drift at the input is less than 10.mu.V/hr at 25.deg.C. This type of amplifier would be useful for the high-gain transistorized d.c. amplifier for analog computers. Also, due to the high input impedance, it is suitable for amplification of signals from wide range of source impedances.

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Design of a Novel Instrumentation Amplifier using Current-conveyor(CCII) (전류-컨베이어(CCII)를 사용한 새로운 계측 증폭기 설계)

  • CHA, Hyeong-Woo;Jeong, Tae-Yun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.12
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    • pp.80-87
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    • 2013
  • A novel instrumentation amplifier(IA) using positive polarity current-conveyor(CCII+) for electronic measurement systems with low cost, wideband, and gain control with wide range is designed. The IA consists of two CCII+, three resistor, and an operational amplifier(op-amp). The principal of the operating is that the difference of two input voltages applied into two CCII+ used voltage and current follower converts into same currents, and then these current drive resistor of (+) terminal and feedback resistor of op-amp to obtain output voltage. To verify operating principal of the IA, we designed the CCII+ and used commercial op-amp LF356. Simulation results show that voltage follower used CCII+ has offset voltage of 0.21mV at linear range of ${\pm}$4V. The IA had wide gain range from -20dB to 60dB by variation of only one resistor and -3dB frequency for the gain of 60dB was 400kHz. The IA also has merits without matching of external resistor and controllable offset voltage using the other resistor. The power dissipation of the IA is 130mW at supply voltage of ${\pm}$5V.

The Design of DC-DC Converter with Green-Power Switch and DT-CMOS Error Amplifier (Green-Power 스위치와 DT-CMOS Error Amplifier를 이용한 DC-DC Converter 설계)

  • Koo, Yong-Seo;Yang, Yil-Suk;Kwak, Jae-Chang
    • Journal of IKEEE
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    • v.14 no.2
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    • pp.90-97
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    • 2010
  • The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device and DTMOS Error Amplifier is presented in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS(DT-CMOS) with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an DT-CMOS error amplifier and a comparator circuit as a block. the proposed DT-CMOS Error Amplifier has 72dB DC gain and 83.5deg phase margin. also Error Amplifier that use DTMOS more than CMOS showed power consumption decrease of about 30%. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device is achieved the high efficiency near 96% at 100mA output current. And DC-DC converter is designed with Low Drop Out regulator(LDO regulator) in stand-by mode which fewer than 1mA for high efficiency.

A 1.5V 70dB 100MHz CMOS Class-AB Complementary Operational Amplifier (1.5V 70dB 100MHz CMOS Class-AB 상보형 연산증폭기의 설계)

  • 박광민
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.9
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    • pp.743-749
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    • 2002
  • A 1.5V 70㏈ 100MHz CMOS class-AB complementary operational amplifier is presented. For obtaining the high gain and the high unity gain frequency, the input stage of the amplifier is designed with rail-to-rail complementary differential pairs which are symmetrically parallel-connected with the NMOS and the PMOS differential input pairs, and the output stage is designed to the rail-to-rail class-AB output stage including the elementary shunt stage technique. With this design technique for output stage, the load dependence of the overall open loop gain is improved and the push-pull class-AB current control can be implemented in a simple way. The designed operational amplifier operates perfectly on the complementary mode with 180$^{\circ}$ phase conversion for 1.5V supply voltage, and shows the push-pull class-AB operation. In addition, the amplifier shows the DC open loop gain of 70.4 ㏈ and the unity gain frequency of 102 MHz for $C_{L=10㎊∥}$ $R_{L=1㏁}$ Parallel loads. When the resistive load $R_{L}$ is varied from 1 ㏁ to 1 ㏀, the DC open loop gain of the amplifier decreases by only 2.2 ㏈.a$, the DC open loop gain of the amplifier decreases by only 2.2 dB.

3.2-kW 9.7-GHz Polarization-maintaining Narrow-linewidth All-fiber Amplifier

  • Hang Liu;Yujun Feng;Xiaobo Yang;Yao Wang;Hongming Yu;Jue Wang;Wanjing Peng;Yanshan Wang;Yinhong Sun;Yi Ma;Qingsong Gao;Chun Tang
    • Current Optics and Photonics
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    • v.8 no.1
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    • pp.65-71
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    • 2024
  • We present a Yb-doped narrow-linewidth polarization-maintaining all-fiber amplifier that achieves a high mode-instability (MI) threshold, high output power, and 9.7-GHz spectral linewidth. Six wavelength-multiplexed laser diodes are used to pump this amplifier. First, we construct a high-power fiber amplifier based on a master oscillator-power amplifier configuration for experiments. Subsequently, we examine the MI threshold by individually pumping the amplifier with wavelengths of 976, 974, 981, 974, and 981 nm respectively. The experimental results demonstrate that the amplifier exhibits a high MI threshold (>3.5 kW) when pumped with a combination of wavelengths at 974 and 981 nm. Afterward, we inject an optimized phase-modulated seed with a nearly flat-top spectrum into this amplifier. Ultimately, laser output of 3.2 kW and 9.7 GHz are obtained.

A Fast-Switching Current-Pulse Driver for LED Backlight (LED 백라이트를 위한 고속 스위칭 전류-펄스 드라이버)

  • Yang, Byung-Do;Lee, Yong-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.7
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    • pp.39-46
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    • 2009
  • A fast-switching current-pulse driver for light emitting diode (LED) backlight is proposed. It uses a regulated drain current mirror (RD-CM) [1] and a high-voltage NMOS transistor (HV-NMOS). It achieves the fast-response current-pulse switching by using a dynamic gain-boosting amplifier (DGB-AMP). The DGB-AMP does not discharge the large HV-NMOS gate capacitance of the RD-CM when the output current switch turns off. Therefore, it does not need to charge the HV-NMOS gate capacitance when the switch turns on. The proposed current-pulse driver achieves the fast current switching by removing the repetitive gate discharging and charging. Simulation results were verified with measurements performed on a fabricated chip using a 5V/40V 0.5um BCD process. It reduces the switching delay to 360ns from 700ns of the conventional current-pulse driver.

The 4bit Cell Array Structure of PoRAM and A Sensing Method for Drive this Structure (PoRAM의 4bit 셀 어레이 구조와 이를 동작시키기 위한 센싱 기법)

  • Kim, Jung-Ha;Lee, Sang-Sun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.6 s.360
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    • pp.8-18
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    • 2007
  • In this paper, a 4bit cell way structure of PoRAM and the sensing method to drive this structure are researched. PoRAM has a different operation from existing SRAM and DRAM. The operation is that when certain voltage is applied between top electrode and bottom electrode of PoRAM device we can classify the cell state by measuring cell current which is made by changing resistance of the cell. In the decoder selected by new-addressing method in the cell array, the row decoder is selected "High" and the column decoder is selected "Low" then certain current will flow to the bit-line. Because this current is detect, in order to make large enough current, the voltage sense amplifier is used. In this case, usually, 1-stage differential amplifier using current mirror is used. Furthermore, the detected value at the cell is current, so a diode connected NMOSFET, that is, a device resistor is used at the input port of the differential amplifier to converter current into voltage. Using this differential amplifier, we can classify the cell states, erase mode is "Low" and write mode is "High", by comparing the input value, Vin, that is a product of current value multiplied by resistor value with a reference voltage, Vref.

Analysis of Transistorized Logarithmic Amplifier (트랜지스터 대수증폭기의 해석)

  • 이상배
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.6 no.1
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    • pp.19-22
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    • 1969
  • Detailed analysis has been developed concerning the transfer function and stability condition of the logarithmic amplifier using a common emitter transistor as a feed-back element. The analysis shows that input current vs output voltage transfer characteristics is accurately ogarithmic through entire operating current, and the time constant depends on input capcitance and collector-emitter equivalent resistance. Also the minimum value of imput capacitance required to stabilize the system is derived.

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Design of a 1~10 GHz High Gain Current Reused Low Noise Amplifier in 0.18 ㎛ CMOS Technology

  • Seong, Nack-Gyun;Jang, Yo-Han;Choi, Jae-Hoon
    • Journal of electromagnetic engineering and science
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    • v.11 no.1
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    • pp.27-33
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    • 2011
  • In this paper, we propose a high gain, current reused ultra wideband (UWB) low noise amplifier (LNA) that uses TSMC 0.18 ${\mu}m$ CMOS technology. To satisfy the wide input matching and high voltage gain requirements with low power consumption, a resistive current reused technique is utilized in the first stage. A ${\pi}$-type LC network is adopted in the second stage to achieve sufficient gain over the entire frequency band. The proposed UWB LNA has a voltage gain of 12.9~18.1 dB and a noise figure (NF) of 4.05~6.21 dB over the frequency band of interest (1~10 GHz). The total power consumption of the proposed UWB LNA is 10.1 mW from a 1.4 V supply voltage, and the chip area is $0.95{\times}0.9$ mm.