Laser-based crystallization techniques are ideally-suited for forming high-quality crystalline Si films on active-matrix display backplanes, because the highly-localized energy deposition allows for transformation of the as-deposited a-Si without damaging high-temperature-intolerant glass and plastic substrates. However, certain significant and non-trivial attributes must be satisfied for a particular method and implementation to be considered manufacturing-worthy. The crystallization process step must yield a Si microstructure that permits fabrication of thin-film transistors with sufficient uniformity and performance for the intended application and, the realization and implementation of the method must meet specific requirements of viability, robustness and economy in order to be accepted in mass production environments. In recent years, Low Temperature Polycrystalline Silicon (LTPS) has demonstrated its advantages through successful implementation in the application spaces that include highly-integrated active-matrix liquid-crystal displays (AMLCDs), cost competitive AMLCDs, and most recently, active-matrix organic light-emitting diode displays (AMOLEDs). In the mobile display market segment, LTPS continues to gain market share, as consumers demand mobile devices with higher display performance, longer battery life and reduced form factor. LTPS-based mobile displays have clearly demonstrated significant advantages in this regard. While the benefits of LTPS for mobile phones are well recognized, other mobile electronic applications such as portable multimedia players, tablet computers, ultra-mobile personal computers and notebook computers also stand to benefit from the performance and potential cost advantages offered by LTPS. Recently, significant efforts have been made to enable robust and cost-effective LTPS backplane manufacturing for AMOLED displays. The majority of the technical focus has been placed on ensuring the formation of extremely uniform poly-Si films. Although current commercially available AMOLED displays are aimed primarily at mobile applications, it is expected that continued development of the technology will soon lead to larger display sizes. Since LTPS backplanes are essentially required for AMOLED displays, LTPS manufacturing technology must be ready to scale the high degree of uniformity beyond the small and medium displays sizes. It is imperative for the manufacturers of LTPS crystallization equipment to ensure that the widespread adoption of the technology is not hindered by limitations of performance, uniformity or display size. In our presentation, we plan to present the state of the art in light sources and beam delivery systems used in high-volume manufacturing laser crystallization equipment. We will show that excimer-laser-based crystallization technologies are currently meeting the stringent requirements of AMOLED display fabrication, and are well positioned to meet the future demands for manufacturing these displays as well.
Kim, Dae-Min;Han, Yoon-Soo;Kim, Seongwon;Oh, Yoon-Suk;Lim, Dae-Soon;Kim, Hyung-Tae;Lee, Sung-Min
Journal of the Korean Ceramic Society
/
v.52
no.6
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pp.410-416
/
2015
Recently, a new $Y_2O_3$ coating deposited using the EB-PVD method has been developed for erosion resistant applications in fluorocarbon plasma environments. In this study, surface crack formation in the $Y_2O_3$ coating has been analyzed in terms of residual stress and elastic modulus. The coating, deposited on silicon substrate at temperatures higher than $600^{\circ}C$, showed itself to be sound, without surface cracks. When the residual stress of the coating was measured using the Stoney formula, it was found to be considerably lower than the value calculated using the elastic modulus and thermal expansion coefficient of bulk $Y_2O_3$. In addition, amorphous $SiO_2$ and crystalline $Al_2O_3$ coatings were similarly prepared and their residual stresses were compared to the calculated values. From nano-indentation measurement, the elastic modulus of the $Y_2O_3$ coating in the direction parallel to the coating surface was found to be lower than that in the normal direction. The lower modulus in the parallel direction was confirmed independently using the load-deflection curves of a micro-cantilever made of $Y_2O_3$ coating and from the average residual stress-temperature curve of the coated sample. The elastic modulus in these experiments was around 33 ~ 35 GPa, which is much lower than that of a sintered bulk sample. Thus, this low elastic modulus, which may come from the columnar feather-like structure of the coating, contributed to decreasing the average residual tensile stress. Finally, in terms of toughness and thermal cycling stability, the implications of the lowered elastic modulus are discussed.
Phee, Young Gyu;Roh, Young Man;Lee, Kwang Mook;Kim, Hyoung-Ah;Kim, Yong Woo;Won, Jeoung Il;Kim, Hyunwook
Journal of Korean Society of Occupational and Environmental Hygiene
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v.7
no.2
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pp.196-208
/
1997
This study was performed to estimate quartz contents in the both bulk and airborne dust samples and to determine particle size distribution of airborne dust from the selected foundry operations. Total dust samples were collected by a 37mm cassette and respirable by a 10 mm nylon cyclone. Particle size distributions were determined by a Marple's 8-stage cascade impactor at the melting, molding, shakeout and finishing operations. The presence of elements in the dust samples were confirmed by the scanning electron microscopy equipped with the energy dispersive x-ray spectrometry. The quartz contents were estimated using the intensity of the absorption peak of quartz at 799 cm-l by the Fourie Transformed Infrared Spectroscopy (FTIR). The results were as follows: 1. The analysis of data from cascade Impactor showed bimodal distributions of particle size at the melting, molding and shakeout operations. Mass median aerodynamic diameters for the distributions determined by histogram were $0.48-1.65{\mu}m$ for small and $13.43-19.58{\mu}m$ for large modes. In the dust samples collected at the finishing operations, however, only a large mode of $18.89{\mu}m$ was found. 2. The percentages of total to respirable dust concentration calculated from the impactor data ranged from 42 % to 66 %. The average concentrations of respirable dust by cyclone were $0.85-1.28mg/m^3$ collected from the workers, and were $0.23-0.56mg/m^3$ from the areas surveyed. Dust concentrations of personal samples were statistically significantly higher than those of area samples. The highest dust concentration was obtained from the personal samples of the finishing operation. 3. The mean percentages of silicon and oxygen estimated by SEM-EDXA in the bulk samples ranged from 35.83 % to 36.02 % and from 39.93 %-41.64 %, respectively. 4. The average quartz contents estimated by FTIR in the respirable dust from personal samples ranged from 4.32 % to 5.36 % and 4.54 % to 4.70 % in the bulk samples. No statistical difference of quartz content was found between foundry operations. In this study, quartz content was quantified by FTIR. Although no statistically significant difference in quartz content between airborne and bulk, samples and between different foundry operations was found, it is recommended that quartz content in the individual sample of respirable dust be analyzed and the results be used either to select an applicable quartz limits or to calculate the exposure limit. Further studies, however, are needed to compare the results by FTIR and XRD since it is reported that the quartz content determined by FTIR is different from that by XRD.
Thin crystalline silicon (C-Si) solar cell is expected to be a low price energy source by decreasing the consumption of Si. However, thin c-Si solar cell entails the bowing and crack issues in high temperature manufacturing process. Thus, the conventional tabbing process, based on high temperature soldering (> $250^{\circ}C$), has difficulties for applying to thin c-Si solar cell modules. In this paper, a conductive paste (CP) based interconnection process has been proposed to fabricate thin c-Si solar cell modules with high production yield, instead of existing soldering materials. To optimize the process condition for CP based interconnection, we compared the performance and stability of modules fabricated under various lamination temperature (120, 150, and $175^{\circ}C$). The power from CP based module is similar to that with conventional tabbing process, as modules are fabricated. However, the output of CP based module laminated at $120^{\circ}C$ decreases significantly (14.1% for Damp heat and 6.1% for thermal cycle) in harsh condition, while the output drops only in 3% in the samples process at $150^{\circ}C$, $175^{\circ}C$. The peel test indicates that the unstable performance of sample laminated at $120^{\circ}C$ is attributed to weak adhesion strength (1.7 N) between cell and ribbon compared to other cases (2.7 N). As a result, optimized lamination temperature for CP based module process is $150^{\circ}C$, considering stability and energy consumption during the fabrication.
In commercial solar cells, the pattern of the front electrode is critical to effectively assemble the photo generated current. The power loss in solar cells caused by the front electrode was categorized as four types. First, losses due to the metallic resistance of the electrode. Second, losses due to the contact resistance of the electrode and emitter. Third, losses due to the emitter resistance when current flows through the emitter. Fourth, losses due to the shading effect of the front metal electrode, which has a high reflectance. In this paper, optimizing the number of finger on a $4{\times}4$ solar cell is demonstrated with known theory. We compared the short circuit current density and fill factor to evaluate the power loss from the front metal contact calculation result. By experiment, the short circuit current density($J_{sc}$), taken in each pattern as 37.61, 37.53, and $37.38mA/cm^2$ decreased as the number of fingers increased. The fill factor(FF), measured in each pattern as 0.7745, 0.7782 and 0.7843 increased as number of fingers increased. The results suggested that the efficiency(Eff) was measured in each pattern as 17.51, 17.81, and 17.84 %. Throughout this study, the short-circuit current densities($J_{sc}$) and fill factor(FF) varied according to the number of fingers in the front metal pattern. The effects on the efficiency of the two factors were also investigated.
In the recent years, thin film solar cells (TFSCs) have emerged as a viable replacement for crystalline silicon solar cells and offer a variety of choices, particularly in terms of synthesis processes and substrates (rigid or flexible, metal or insulator). Among the thin-film absorber materials, SnS has great potential for the manufacturing of low-cost TFSCs due to its suitable optical and electrical properties, non-toxic nature, and earth abundancy. However, the efficiency of SnS-based solar cells is found to be in the range of 1 ~ 4 % and remains far below those of CdTe-, CIGS-, and CZTSSe-based TFSCs. Aside from the improvement in the physical properties of absorber layer, enormous efforts have been focused on the development of suitable buffer layer for SnS-based solar cells. Herein, we investigate the device performance of SnS-based TFSCs by introducing double buffer layers, in which CdS is applied as first buffer layer and ZnMgO films is employed as second buffer layer. The effect of the composition ratio (Mg/(Mg+Zn)) of RF sputtered ZnMgO films on the device performance is studied. The structural and optical properties of ZnMgO films with various Mg/(Mg+Zn) ratios are also analyzed systemically. The fabricated SnS-based TFSCs with device structure of SLG/Mo/SnS/CdS/ZnMgO/AZO/Al exhibit a highest cell efficiency of 1.84 % along with open-circuit voltage of 0.302 V, short-circuit current density of 13.55 mA cm-2, and fill factor of 0.45 with an optimum Mg/(Mg + Zn) ratio of 0.02.
Kim, Tae-Wan;Kim, Dong-Hyun;Jin, Hyeong-Ho;Lee, Heon-Soo;Park, Hong-Chae;Yoon, Seog-Young
Journal of the Korean Crystal Growth and Crystal Technology
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v.22
no.2
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pp.92-98
/
2012
The co-precipitation technique has been applied to synthesize biphasic calcium phosphate (BCP). $Ca(NO_3)_2{\cdot}4H_2O$, $(NH_4)_2HPO_4$, TEOS and $Mg(NO_3)_2{\cdot}6H_2O$ as the starting materials was used. After the heat treatment of powder crystalline phases HAp and ${\beta}$-TCP analysis showed a mixed phase. The overall spectra appear to have mainly two modes corresponding to characteristic $PO^{3-}_4$ and $OH^-$ groups. After immersion in Hanks' Balanced Salt Solution (HBSS) for 1 week a precipitation started to be formed with individual small granules on the specimen surface. An MTT assay indicated that ionic substituted BCP powders had no cytotoxic effects on MG-63 cells, and that they have good biocompatibility.
With rapid increasing production and installation, recycling of photovoltaic modules has become the main issue. According to the research, the accumulation of waste modules will reach to 8600 tons in 2030. Moreover, Crystalline-silicon (c-Si) Photovoltaic modules account for more than 90% of the waste. C-Si PV modules contain 1.3% of weight of photovoltaic ribbon inside which contains the most of lead, tin and copper in the PV modules, which would cause environmental and humility problem. This study provided a valuable metal separation process for PV ribbons. Ribbons content 82.1% of Cu, 8.9% of Sn, 5.2% of Pb, and 3.1% of Ag. All of them were leached by 3M of hydrochloric acid in the optimal condition. Ag was halogenated to AgCl and precipitated. Cu ion was extracted and separated from Pb and Sn by Lix984N then stripped by 3M H2SO4. The effect of the optimal parameters of extraction was also studied in this essay. The maximum extraction efficiency of Cu ion was 99.64%. The separation condition of Pb and Sn were obtained by adjusting the pH value to 4 thought ammonia to precipitate and separate Pb and Sn. The recovery of Pb and Sn can reach 99%.
Kwon, Ku Eun;Kim, Sung Joon;Kim, Soo In;Lee, Chang Woo
Journal of the Korean Vacuum Society
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v.22
no.4
/
pp.188-192
/
2013
Many studies have been conducted for preventing from diffusion between silicon wafer and metallic thin film due to a decrease of line-width and multi-layer thin film for miniaturization and high integration of semiconductor. This paper has focused on the nano-mechanical property of diffusion barrier which sample is prepared for various gas flow rate of nitrogen with tungsten (W) base from 2.5 to 10 sccm. The deposition rate, resistivity and crystallographic properties were measured by a ${\beta}$-ray back-scattering spectroscopy, 4-point probe and x-ray diffraction (XRD), respectively. We also has investigated the nano-mechanical property using the nano-indenter. As a result, the surface hardness of W-N thin film was increased rapidly from 10.07 to 15.55 GPa when the nitrogen gas flow was increased from 2.5 to 5 sccm. And the surface hardness of W-N thin film had 12.65 and 12.77 GPa at the nitrogen gas flow of 7.5 and 10 sccm respectively. These results were decreased by the comparison with the W-N thin film at nitrogen gas flow of 5 sccm. It was inferred that these severe changes were caused by the stoichiometric difference between the crystalline and amorphous state in W-N thin film. In addition, these results were caused by increased compressive stress.
Kim, Hongrae;Jeong, Sungjin;Cho, Jaewoong;Kim, Sungheon;Han, Seungyong;Dhungel, Suresh Kumar;Yi, Junsin
Journal of the Korean Institute of Electrical and Electronic Material Engineers
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v.35
no.6
/
pp.603-609
/
2022
Passivation quality is mainly governed by epitaxial growth of crystalline silicon wafer surface. Void-rich intrinsic a-Si:H interfacial layer could offer higher resistivity of the c-Si surface and hence a better device efficiency as well. To reduce the resistivity of the contact area, a modification of void-rich intrinsic layer of a-Si:H towards more ordered state with a higher density is adopted by adapting its thickness and reducing its series resistance significantly, but it slightly decreases passivation quality. Higher resistance is not dominated by asymmetric effects like different band offsets for electrons or holes. In this study, multilayer of intrinsic a-Si:H layers were used. The first one with a void-rich was a-Si:H(I1) and the next one a-SiOx:H(I2) were used, where a-SiOx:H(I2) had relatively larger band gap of ~2.07 eV than that of a-Si:H (I1). Using a-SiOx:H as I2 layer was expected to increase transparency, which could lead to an easy carrier transport. Also, higher implied voltage than the conventional structure was expected. This means that the a-SiOx:H could be a promising material for a high-quality passivation of c-Si. In addition, the i-a-SiOx:H microstructure can help the carrier transportation through tunneling and thermal emission.
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