• The Transactions of the Korean Institute of Power Electronics
• /
• v.19 no.1
• /
• pp.23-30
• /
• 2014

This paper proposes a single power-conversion ac-dc converter with a dc-link capacitor-less and high power factor. The proposed converter is derived by integrating a full-bridge diode rectifier and a series-resonant active-clamp dc-dc converter. To obtain a high power factor without a power factor correction circuit, this paper proposes a suitable control algorithm for the proposed converter. The proposed converter provides single power-conversion by using the proposed control algorithm for both power factor correction and output control. Also, the active-clamp circuit clamps the surge voltage of switches and recycles the energy stored in the leakage inductance of the transformer. Moreover, it provides zero-voltage turn-on switching of the switches. Also, a series-resonant circuit of the output-voltage doubler removes the reverse-recovery problem of the output diodes. The proposed converter provides maximum power factor of 0.995 and maximum efficiency of 95.1% at the full-load. The operation principle of the converter is analyzed and verified. Experimental results for a 400W ac-dc converter at a constant switching frequency of 50kHz are obtained to show the performance of the proposed converter.

• Journal of Power Electronics
• /
• v.4 no.1
• /
• pp.18-27
• /
• 2004

The output storage capacitor of the PFC converters is commonly designed for the selected hold-up time or the allowed output ripple voltage percentage. Nevertheless, this output capacitor is a main contribution factor to the PFC system stability. Moreover, seeking for a minimum output storage capacitor that assures the PFC desired operation under all condition, and providing the advantage of a small size and low cost is the main interesting target for engineering. Therefore, in this issue the design steps of the PFC converter have been discussed depending on three choices, output ripple, hold-up time, and stability. It is cleared that any design must take the minimum required storage capacitor for stability prospective as step-l in deign, then apply for any other specification like hold-up time or ripple percentage.

• Proceedings of the KIEE Conference
• /
• 2002.07b
• /
• pp.1120-1122
• /
• 2002

Switching power supply are widely used in many industrial field. Power factor improvement and harmonic reduction technique is very important in switching power supply. The power factor correction (PFC) circuit using boost converter used in input of power source is studied in this paper. It is analyzed distortional situations and harmonics of input currents that presented at continuous conduction mode(CCM) of boost PFC circuit. It is done simulations of harmonics distribution according to load variation by using PSPICE and MATLAB. From the actual experiment of boost PFC circuit the validity of the analysis is confirmed.

• Proceedings of the KSR Conference
• /
• 2011.05a
• /
• pp.82-92
• /
• 2011

This paper presents a PFC(Power Factor Correction) system to control the power factor of input current of the converter system which is working in the propulsion system of KTX high speed train. In the KTX train system, initially introduced from ALSTOM, the thyristor converter with phase controlling technique is adopted in the current fed type powering system. The input current induces harmonic losses highly because the waveform becomes rectangular shapes according to the filter inductor current increased as the train speed increasing gradually. Especially the interference with the signalling systems is severe concerned due to high current harmonics on the catenary line. To protect this problem, a frequency trap filter(notch filter) is operating with the input converter system. In this paper, an analysis work and PC simulation have been done on the PFC system to upgrade its performance and maintenance efficiency.

• Journal of Power Electronics
• /
• v.15 no.3
• /
• pp.644-651
• /
• 2015

This paper introduces a novel digital one cycle control (DOCC) boost power factor correction (PFC) converter. The proposed PFC converter realizes the FPGA-based DOCC control approach for single-phase PFC rectifiers without input voltage sensing or a complicated two-loop compensation design. It can also achieve a high power factor and the operation of low harmonic input current ingredients over universal loads in continuous conduction mode. The trailing triangle modulation adopted in this approach makes the acquisition of the average input current an easy process. The controller implementation is based on a boost topology power circuit with low speed, low-resolution A/D converters, and economical FPGA development board. Experimental results demonstrate that the proposed PFC rectifier can obtain a PF value of up to 0.999 and a minimum THD of at least 1.9% using a 120W prototype.

• Proceedings of the KIEE Conference
• /
• 1996.07a
• /
• pp.564-566
• /
• 1996

New simple control method of power factor correcting(PFC) boost convertor without instantaneous measurement of input current is proposed. Using the averaged model, the power factor correction scheme is presented. With the measurements of input voltage and output voltage, the control signal is generated to make the shape of the line current same as the input voltage. The validity of the controller is verified through the computer simulations.

• Proceedings of the KIEE Conference
• /
• 1996.07a
• /
• pp.306-308
• /
• 1996

The demands of minimizing the reactive power and reducing the current harmonics are increasing nowdays. The inverter airconditioner needs high inductive power and it operates with wide load ranges. Conventionally, an huge LC passive filter is used in airconditioner to improve the power factor and to reduce current harmonics which doesn't give good results. In this paper, a design of active power factor correction(APFC)circuit for inverter airconditioner is described. To improve the P.F and reduce the current THD, average current controlled APFC is designed and tested. The problems of APFC implementation, their solution and testing results are described.

• Proceedings of the KIPE Conference
• /
• 2000.07a
• /
• pp.163-167
• /
• 2000

This paper presents the digital control of single-phase power factor correction(PFC) converter which has the variable gain according to the condition of inner control loop error. Generally the gain of inner current control loop in single-stage PFC converter has a constant magnitude. This has a bad influence on the power factor because current loop doesn't operate smoothly in the condition that input voltage is low In particular a digital controller has more time delay than an analog controller and degrades This drops the phase margin of the total digital PFC system,. It causes the problem that the gain of current control loop isn't increased enough. In addition the oscillation happens in the peak value of the input voltage open loop PFC system gain changes according to ac input voltage. These aspects make the design of the digital PFC controller difficult The digital PFC controller presented in this paper has a variable gain of current control loop according to input voltage. The 1kW converter was used to verify the efficiency of the digital PFC controller.

• Journal of Power Electronics
• /
• v.10 no.3
• /
• pp.293-299
• /
• 2010

In this paper, a single-phase PFC (Power Factor Correction) dual boost converter based on input voltage estimation is studied for DC inverter air conditioner. It is focused on improving input power factor and power quality to satisfy the recent harmonic current regulation standards. Furthermore the input voltage estimation is introduced for price competitive products. A low cost and reasonable control system is implemented using a specified high-speed 32-bit microprocessor. Their effectiveness are verified through theoretical analysis and experiments.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.8 no.1
• /
• pp.85-91
• /
• 2008

A Boost Power Factor Correction (PFC) Converter employing Zero Voltage Switching (ZVS) based Compound Active Clamping (CAC) technique is presented in this paper. An Electro Magnetic Interference (EMI) Filer is connected at the line side of the proposed converter to suppress Electro Magnetic Interference. The proposed converter can effectively reduce the losses caused by diode reverse recovery. Both the main switch and the auxiliary switch can achieve soft switching i.e. ZVS under certain condition. The parasitic oscillation caused by the parasitic capacitance of the boost diode is eliminated. The voltage on the main switch, the auxiliary switch and the boost diode are clamped. The principle of operation, design and simulation results are presented here. A prototype of the proposed converter is built and tested for low input voltage i.e. 15V AC supply and the experimental results are obtained. The power factor at the line side of the converter and the converter efficiency are improved using the proposed technique.